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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2020-08-24 19:32:51 +0300
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2020-09-07 23:24:51 +0300
commit43df4eb2fc9511e09c66252c3fec4f8933a77c73 (patch)
tree372ef0796bbfdf94373ce22b0489f6a26c127be8 /arch/mips/include/asm/mach-sibyte
parenta7fbed988f31d3bf92415226fdf2ffd54606ad93 (diff)
downloadlinux-43df4eb2fc9511e09c66252c3fec4f8933a77c73.tar.xz
MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDS
SB1250 uart bug is related to PASS 2 workarounds. Use config CONFIG_SB1_PASS_2_WORKAROUNDS directly and get rid of SIBYTE_1956_WAR. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/include/asm/mach-sibyte')
-rw-r--r--arch/mips/include/asm/mach-sibyte/war.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/mips/include/asm/mach-sibyte/war.h b/arch/mips/include/asm/mach-sibyte/war.h
index fa9bbc228dd7..71eff5bc3f53 100644
--- a/arch/mips/include/asm/mach-sibyte/war.h
+++ b/arch/mips/include/asm/mach-sibyte/war.h
@@ -15,12 +15,10 @@ extern int sb1250_m3_workaround_needed(void);
#endif
#define BCM1250_M3_WAR sb1250_m3_workaround_needed()
-#define SIBYTE_1956_WAR 1
#else
#define BCM1250_M3_WAR 0
-#define SIBYTE_1956_WAR 0
#endif