diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2016-05-22 01:39:18 +0300 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-05-28 13:35:09 +0300 |
| commit | 4939788eb8559754a120531c49ffa96bb30fee06 (patch) | |
| tree | f9fd1fb32cf74f35039e8191134ad620c3ceba42 /arch/mips/include | |
| parent | a320a1156ac987ae45d2a922f8f7355d67658e83 (diff) | |
| download | linux-4939788eb8559754a120531c49ffa96bb30fee06.tar.xz | |
MIPS: Spelling fix lets -> let's
As noticed by Sergei in the discussion of Andrea Gelmini's patch series.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Diffstat (limited to 'arch/mips/include')
| -rw-r--r-- | arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h | 2 | ||||
| -rw-r--r-- | arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h | 2 | ||||
| -rw-r--r-- | arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h b/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h index ca8077afac4a..456ddba152c4 100644 --- a/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h +++ b/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h @@ -100,7 +100,7 @@ typedef volatile struct au1xxx_ddma_desc { u32 dscr_nxtptr; /* Next descriptor pointer (mostly) */ /* * First 32 bytes are HW specific!!! - * Lets have some SW data following -- make sure it's 32 bytes. + * Let's have some SW data following -- make sure it's 32 bytes. */ u32 sw_status; u32 sw_context; diff --git a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h index 7023883ca50f..8e9b022c3594 100644 --- a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h +++ b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h @@ -22,7 +22,7 @@ /* * during early_printk no ioremap possible at this early stage - * lets use KSEG1 instead + * let's use KSEG1 instead */ #define LTQ_ASC0_BASE_ADDR 0x1E100C00 #define LTQ_EARLY_ASC KSEG1ADDR(LTQ_ASC0_BASE_ADDR) diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h index f87310755319..17b41bb5991f 100644 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h @@ -75,7 +75,7 @@ extern __iomem void *ltq_cgu_membase; /* * during early_printk no ioremap is possible - * lets use KSEG1 instead + * let's use KSEG1 instead */ #define LTQ_ASC1_BASE_ADDR 0x1E100C00 #define LTQ_EARLY_ASC KSEG1ADDR(LTQ_ASC1_BASE_ADDR) |