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| author | Ingo Molnar <mingo@kernel.org> | 2020-10-09 09:55:17 +0300 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2020-10-09 09:55:17 +0300 |
| commit | e705d397965811ac528d7213b42d74ffe43caf38 (patch) | |
| tree | 8a5bbe85cc42e64992b97859976e307027f83e33 /arch/mips/kernel/traps.c | |
| parent | d89d5f855f84ccf3f7e648813b4bb95c780bd7cd (diff) | |
| parent | baffd723e44dc3d7f84f0b8f1fe1ece00ddd2710 (diff) | |
| download | linux-e705d397965811ac528d7213b42d74ffe43caf38.tar.xz | |
Merge branch 'locking/urgent' into locking/core, to pick up fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/mips/kernel/traps.c')
| -rw-r--r-- | arch/mips/kernel/traps.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 38aa07ccdbcc..cf788591f091 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1287,6 +1287,18 @@ static int enable_restore_fp_context(int msa) err = own_fpu_inatomic(1); if (msa && !err) { enable_msa(); + /* + * with MSA enabled, userspace can see MSACSR + * and MSA regs, but the values in them are from + * other task before current task, restore them + * from saved fp/msa context + */ + write_msa_csr(current->thread.fpu.msacsr); + /* + * own_fpu_inatomic(1) just restore low 64bit, + * fix the high 64bit + */ + init_msa_upper(); set_thread_flag(TIF_USEDMSA); set_thread_flag(TIF_MSA_CTX_LIVE); } |