diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2022-03-25 19:35:19 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2022-03-25 19:35:19 +0300 |
commit | 9a8b3d5f71eb74b1b95927bd320b1070866a119a (patch) | |
tree | f2c99aeb42144f59a65b0c2aecdbddd6649bc93b /arch/mips/kernel | |
parent | 34af78c4e616c359ed428d79fe4758a35d2c5473 (diff) | |
parent | f8f9f21c7848e63133c16c899f3d84aa54eb79fe (diff) | |
download | linux-9a8b3d5f71eb74b1b95927bd320b1070866a119a.tar.xz |
Merge tag 'mips_5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer:
- added support for QCN550x (ath79)
- enabled KCSAN
- removed TX39XX support
- various cleanups and fixes
* tag 'mips_5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (31 commits)
MIPS: Fix build error for loongson64 and sgi-ip27
MIPS: ingenic: correct unit node address
MIPS: Fix wrong comments in asm/prom.h
MIPS: Remove redundant definitions of device_tree_init()
MIPS: Remove redundant check in device_tree_init()
MIPS: pgalloc: fix memory leak caused by pgd_free()
MIPS: RB532: fix return value of __setup handler
MIPS: Only use current_stack_pointer on GCC
MIPS: boot/compressed: Use array reference for image bounds
mips: cdmm: Fix refcount leak in mips_cdmm_phys_base
mips: remove reference to "newer Loongson-3"
mips: Always permit to build u-boot images
MIPS: Sanitise Cavium switch cases in TLB handler synthesizers
DEC: Limit PMAX memory probing to R3k systems
mips: DEC: honor CONFIG_MIPS_FP_SUPPORT=n
MIPS: fix fortify panic when copying asm exception handlers
mips: ralink: fix a refcount leak in ill_acc_of_setup()
mips: Implement "current_stack_pointer"
MIPS: Remove TX39XX support
MIPS: Modernize READ_IMPLIES_EXEC
...
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r-- | arch/mips/kernel/Makefile | 1 | ||||
-rw-r--r-- | arch/mips/kernel/cpu-probe.c | 23 | ||||
-rw-r--r-- | arch/mips/kernel/cpu-r3k-probe.c | 22 | ||||
-rw-r--r-- | arch/mips/kernel/elf.c | 16 | ||||
-rw-r--r-- | arch/mips/kernel/entry.S | 3 | ||||
-rw-r--r-- | arch/mips/kernel/genex.S | 5 | ||||
-rw-r--r-- | arch/mips/kernel/idle.c | 10 | ||||
-rw-r--r-- | arch/mips/kernel/irq_txx9.c | 13 | ||||
-rw-r--r-- | arch/mips/kernel/proc.c | 2 | ||||
-rw-r--r-- | arch/mips/kernel/process.c | 2 | ||||
-rw-r--r-- | arch/mips/kernel/prom.c | 5 | ||||
-rw-r--r-- | arch/mips/kernel/r4k-bugs64.c | 9 | ||||
-rw-r--r-- | arch/mips/kernel/scall32-o32.S | 1 | ||||
-rw-r--r-- | arch/mips/kernel/scall64-n64.S | 1 | ||||
-rw-r--r-- | arch/mips/kernel/signal.c | 1 | ||||
-rw-r--r-- | arch/mips/kernel/signal_n32.c | 1 | ||||
-rw-r--r-- | arch/mips/kernel/traps.c | 22 |
17 files changed, 31 insertions, 106 deletions
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index 814b3da30501..7c96282bff2e 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -44,7 +44,6 @@ obj-$(CONFIG_FUNCTION_TRACER) += mcount.o ftrace.o sw-y := r4k_switch.o sw-$(CONFIG_CPU_R3000) := r2300_switch.o -sw-$(CONFIG_CPU_TX39XX) := r2300_switch.o sw-$(CONFIG_CPU_CAVIUM_OCTEON) := octeon_switch.o obj-y += $(sw-y) diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 24a529c6c4be..f0ea92937546 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1189,29 +1189,6 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) c->tlbsize = 48; break; #endif - case PRID_IMP_TX39: - c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; - c->options = MIPS_CPU_TLB | MIPS_CPU_TX39_CACHE; - - if ((c->processor_id & 0xf0) == (PRID_REV_TX3927 & 0xf0)) { - c->cputype = CPU_TX3927; - __cpu_name[cpu] = "TX3927"; - c->tlbsize = 64; - } else { - switch (c->processor_id & PRID_REV_MASK) { - case PRID_REV_TX3912: - c->cputype = CPU_TX3912; - __cpu_name[cpu] = "TX3912"; - c->tlbsize = 32; - break; - case PRID_REV_TX3922: - c->cputype = CPU_TX3922; - __cpu_name[cpu] = "TX3922"; - c->tlbsize = 64; - break; - } - } - break; case PRID_IMP_R4700: c->cputype = CPU_R4700; __cpu_name[cpu] = "R4700"; diff --git a/arch/mips/kernel/cpu-r3k-probe.c b/arch/mips/kernel/cpu-r3k-probe.c index af654771918c..be93469c0e0e 100644 --- a/arch/mips/kernel/cpu-r3k-probe.c +++ b/arch/mips/kernel/cpu-r3k-probe.c @@ -118,28 +118,6 @@ void cpu_probe(void) c->options |= MIPS_CPU_FPU; c->tlbsize = 64; break; - case PRID_COMP_LEGACY | PRID_IMP_TX39: - c->options = MIPS_CPU_TLB | MIPS_CPU_TX39_CACHE; - - if ((c->processor_id & 0xf0) == (PRID_REV_TX3927 & 0xf0)) { - c->cputype = CPU_TX3927; - __cpu_name[cpu] = "TX3927"; - c->tlbsize = 64; - } else { - switch (c->processor_id & PRID_REV_MASK) { - case PRID_REV_TX3912: - c->cputype = CPU_TX3912; - __cpu_name[cpu] = "TX3912"; - c->tlbsize = 32; - break; - case PRID_REV_TX3922: - c->cputype = CPU_TX3922; - __cpu_name[cpu] = "TX3922"; - c->tlbsize = 64; - break; - } - } - break; } BUG_ON(!__cpu_name[cpu]); diff --git a/arch/mips/kernel/elf.c b/arch/mips/kernel/elf.c index 7b045d2a0b51..5582a4ca1e9e 100644 --- a/arch/mips/kernel/elf.c +++ b/arch/mips/kernel/elf.c @@ -328,16 +328,10 @@ void mips_set_personality_nan(struct arch_elf_state *state) int mips_elf_read_implies_exec(void *elf_ex, int exstack) { - if (exstack != EXSTACK_DISABLE_X) { - /* The binary doesn't request a non-executable stack */ - return 1; - } - - if (!cpu_has_rixi) { - /* The CPU doesn't support non-executable memory */ - return 1; - } - - return 0; + /* + * Set READ_IMPLIES_EXEC only on non-NX systems that + * do not request a specific state via PT_GNU_STACK. + */ + return (!cpu_has_rixi && exstack == EXSTACK_DEFAULT); } EXPORT_SYMBOL(mips_elf_read_implies_exec); diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S index 4b896f5023ff..891393626dc6 100644 --- a/arch/mips/kernel/entry.S +++ b/arch/mips/kernel/entry.S @@ -17,7 +17,6 @@ #include <asm/stackframe.h> #include <asm/isadep.h> #include <asm/thread_info.h> -#include <asm/war.h> #ifndef CONFIG_PREEMPTION #define resume_kernel restore_all @@ -101,7 +100,7 @@ restore_partial: # restore partial frame SAVE_AT SAVE_TEMP LONG_L v0, PT_STATUS(sp) -#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) +#if defined(CONFIG_CPU_R3000) and v0, ST0_IEP #else and v0, ST0_IE diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index 743d75927b71..3425df6019c0 100644 --- a/arch/mips/kernel/genex.S +++ b/arch/mips/kernel/genex.S @@ -19,7 +19,6 @@ #include <asm/mipsregs.h> #include <asm/stackframe.h> #include <asm/sync.h> -#include <asm/war.h> #include <asm/thread_info.h> __INIT @@ -163,7 +162,7 @@ NESTED(handle_int, PT_SIZE, sp) .set push .set noat mfc0 k0, CP0_STATUS -#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) +#if defined(CONFIG_CPU_R3000) and k0, ST0_IEP bnez k0, 1f @@ -645,7 +644,7 @@ isrdhwr: get_saved_sp /* k1 := current_thread_info */ .set noreorder MFC0 k0, CP0_EPC -#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) +#if defined(CONFIG_CPU_R3000) ori k1, _THREAD_MASK xori k1, _THREAD_MASK LONG_L v1, TI_TP_VALUE(k1) diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c index c81b3a039470..146d9fa77f75 100644 --- a/arch/mips/kernel/idle.c +++ b/arch/mips/kernel/idle.c @@ -36,13 +36,6 @@ static void __cpuidle r3081_wait(void) raw_local_irq_enable(); } -static void __cpuidle r39xx_wait(void) -{ - if (!need_resched()) - write_c0_conf(read_c0_conf() | TX39_CONF_HALT); - raw_local_irq_enable(); -} - void __cpuidle r4k_wait(void) { raw_local_irq_enable(); @@ -147,9 +140,6 @@ void __init check_wait(void) case CPU_R3081E: cpu_wait = r3081_wait; break; - case CPU_TX3927: - cpu_wait = r39xx_wait; - break; case CPU_R4200: /* case CPU_R4300: */ case CPU_R4600: diff --git a/arch/mips/kernel/irq_txx9.c b/arch/mips/kernel/irq_txx9.c index ab00e490482f..af3ef4c9f7de 100644 --- a/arch/mips/kernel/irq_txx9.c +++ b/arch/mips/kernel/irq_txx9.c @@ -72,11 +72,6 @@ static void txx9_irq_unmask(struct irq_data *d) __raw_writel((__raw_readl(ilrp) & ~(0xff << ofs)) | (txx9irq[irq_nr].level << ofs), ilrp); -#ifdef CONFIG_CPU_TX39XX - /* update IRCSR */ - __raw_writel(0, &txx9_ircptr->imr); - __raw_writel(irc_elevel, &txx9_ircptr->imr); -#endif } static inline void txx9_irq_mask(struct irq_data *d) @@ -88,15 +83,7 @@ static inline void txx9_irq_mask(struct irq_data *d) __raw_writel((__raw_readl(ilrp) & ~(0xff << ofs)) | (irc_dlevel << ofs), ilrp); -#ifdef CONFIG_CPU_TX39XX - /* update IRCSR */ - __raw_writel(0, &txx9_ircptr->imr); - __raw_writel(irc_elevel, &txx9_ircptr->imr); - /* flush write buffer */ - __raw_readl(&txx9_ircptr->ssr); -#else mmiowb(); -#endif } static void txx9_irq_mask_ack(struct irq_data *d) diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 9f47a889b047..bb43bf850314 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -181,8 +181,6 @@ static int show_cpuinfo(struct seq_file *m, void *v) seq_puts(m, " 3k_cache"); if (cpu_has_4k_cache) seq_puts(m, " 4k_cache"); - if (cpu_has_tx39_cache) - seq_puts(m, " tx39_cache"); if (cpu_has_octeon_cache) seq_puts(m, " octeon_cache"); if (raw_cpu_has_fpu) diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index cbff1b974f88..c2d5f4bfe1f3 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c @@ -128,7 +128,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, p->thread.reg17 = kthread_arg; p->thread.reg29 = childksp; p->thread.reg31 = (unsigned long) ret_from_kernel_thread; -#if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) +#if defined(CONFIG_CPU_R3000) status = (status & ~(ST0_KUP | ST0_IEP | ST0_IEC)) | ((status & (ST0_KUC | ST0_IEC)) << 2); #else diff --git a/arch/mips/kernel/prom.c b/arch/mips/kernel/prom.c index 6abebd57b218..7db6ff9aed7d 100644 --- a/arch/mips/kernel/prom.c +++ b/arch/mips/kernel/prom.c @@ -64,4 +64,9 @@ int __init __dt_register_buses(const char *bus0, const char *bus1) return 0; } +void __weak __init device_tree_init(void) +{ + unflatten_and_copy_device_tree(); +} + #endif diff --git a/arch/mips/kernel/r4k-bugs64.c b/arch/mips/kernel/r4k-bugs64.c index 35729c9e6cfa..6ffefb2c6971 100644 --- a/arch/mips/kernel/r4k-bugs64.c +++ b/arch/mips/kernel/r4k-bugs64.c @@ -163,7 +163,8 @@ static __always_inline __init void check_mult_sh(void) } pr_cont("no.\n"); - panic(bug64hit, !R4000_WAR ? r4kwar : nowar); + panic(bug64hit, + IS_ENABLED(CONFIG_CPU_R4000_WORKAROUNDS) ? nowar : r4kwar); } static volatile int daddi_ov; @@ -239,7 +240,8 @@ static __init void check_daddi(void) } pr_cont("no.\n"); - panic(bug64hit, !DADDI_WAR ? daddiwar : nowar); + panic(bug64hit, + IS_ENABLED(CONFIG_CPU_DADDI_WORKAROUNDS) ? nowar : daddiwar); } int daddiu_bug = -1; @@ -307,7 +309,8 @@ static __init void check_daddiu(void) } pr_cont("no.\n"); - panic(bug64hit, !DADDI_WAR ? daddiwar : nowar); + panic(bug64hit, + IS_ENABLED(CONFIG_CPU_DADDI_WORKAROUNDS) ? nowar : daddiwar); } void __init check_bugs64_early(void) diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S index 9bfce5f75f60..18dc9b345056 100644 --- a/arch/mips/kernel/scall32-o32.S +++ b/arch/mips/kernel/scall32-o32.S @@ -19,7 +19,6 @@ #include <asm/sysmips.h> #include <asm/thread_info.h> #include <asm/unistd.h> -#include <asm/war.h> #include <asm/asm-offsets.h> .align 5 diff --git a/arch/mips/kernel/scall64-n64.S b/arch/mips/kernel/scall64-n64.S index 5f6ed4b4c399..e6264aa62e45 100644 --- a/arch/mips/kernel/scall64-n64.S +++ b/arch/mips/kernel/scall64-n64.S @@ -18,7 +18,6 @@ #include <asm/sysmips.h> #include <asm/thread_info.h> #include <asm/unistd.h> -#include <asm/war.h> #ifndef CONFIG_MIPS32_COMPAT /* Neither O32 nor N32, so define handle_sys here */ diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c index 5bce782e694c..71e309be86a2 100644 --- a/arch/mips/kernel/signal.c +++ b/arch/mips/kernel/signal.c @@ -35,7 +35,6 @@ #include <asm/sim.h> #include <asm/ucontext.h> #include <asm/cpu-features.h> -#include <asm/war.h> #include <asm/dsp.h> #include <asm/inst.h> #include <asm/msa.h> diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c index 7bd00fad61af..cfc77b69420a 100644 --- a/arch/mips/kernel/signal_n32.c +++ b/arch/mips/kernel/signal_n32.c @@ -24,7 +24,6 @@ #include <asm/ucontext.h> #include <asm/fpu.h> #include <asm/cpu-features.h> -#include <asm/war.h> #include "signal-common.h" diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index a486486b2355..246c6a6b0261 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -2091,19 +2091,19 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs) * If no shadow set is selected then use the default handler * that does normal register saving and standard interrupt exit */ - extern char except_vec_vi, except_vec_vi_lui; - extern char except_vec_vi_ori, except_vec_vi_end; - extern char rollback_except_vec_vi; - char *vec_start = using_rollback_handler() ? - &rollback_except_vec_vi : &except_vec_vi; + extern const u8 except_vec_vi[], except_vec_vi_lui[]; + extern const u8 except_vec_vi_ori[], except_vec_vi_end[]; + extern const u8 rollback_except_vec_vi[]; + const u8 *vec_start = using_rollback_handler() ? + rollback_except_vec_vi : except_vec_vi; #if defined(CONFIG_CPU_MICROMIPS) || defined(CONFIG_CPU_BIG_ENDIAN) - const int lui_offset = &except_vec_vi_lui - vec_start + 2; - const int ori_offset = &except_vec_vi_ori - vec_start + 2; + const int lui_offset = except_vec_vi_lui - vec_start + 2; + const int ori_offset = except_vec_vi_ori - vec_start + 2; #else - const int lui_offset = &except_vec_vi_lui - vec_start; - const int ori_offset = &except_vec_vi_ori - vec_start; + const int lui_offset = except_vec_vi_lui - vec_start; + const int ori_offset = except_vec_vi_ori - vec_start; #endif - const int handler_len = &except_vec_vi_end - vec_start; + const int handler_len = except_vec_vi_end - vec_start; if (handler_len > VECTORSPACING) { /* @@ -2311,7 +2311,7 @@ void per_cpu_trap_init(bool is_boot_cpu) } /* Install CPU exception handler */ -void set_handler(unsigned long offset, void *addr, unsigned long size) +void set_handler(unsigned long offset, const void *addr, unsigned long size) { #ifdef CONFIG_CPU_MICROMIPS memcpy((void *)(ebase + offset), ((unsigned char *)addr - 1), size); |