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authorRalf Baechle <ralf@linux-mips.org>2008-10-28 20:38:42 +0300
committerRalf Baechle <ralf@linux-mips.org>2008-10-30 17:44:34 +0300
commitba3049ed4086737dab200b6087138a4b8e06915d (patch)
tree78a665064e6cc288bb34ef20cd543c2feb204838 /arch/mips/math-emu/cp1emu.c
parent076c6e4f4d81113615f50e5bc2c569f628bcd54a (diff)
downloadlinux-ba3049ed4086737dab200b6087138a4b8e06915d.tar.xz
MIPS: Switch FPU emulator trap to BREAK instruction.
Arguably using the address error handler has always been ugly. But with processors that handle unaligned loads and stores in hardware the current mechanism ceases to work so switch it to a BREAK instruction and allocate break code 514 to the FPU emulator. Yoichi Yuasa provided a build fix for CONFIG_BUG=n. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Diffstat (limited to 'arch/mips/math-emu/cp1emu.c')
-rw-r--r--arch/mips/math-emu/cp1emu.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 7ec0b217dfd3..890f77927d62 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -48,7 +48,6 @@
#include <asm/branch.h>
#include "ieee754.h"
-#include "dsemul.h"
/* Strap kernel emulator for full MIPS IV emulation */
@@ -346,9 +345,6 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx)
/* cop control register rd -> gpr[rt] */
u32 value;
- if (ir == CP1UNDEF) {
- return do_dsemulret(xcp);
- }
if (MIPSInst_RD(ir) == FPCREG_CSR) {
value = ctx->fcr31;
value = (value & ~0x3) | mips_rm[value & 0x3];