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authorArınç ÜNAL <arinc.unal@arinc9.com>2022-03-15 19:01:50 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2022-03-16 17:10:23 +0300
commit7a6ee0bbab2551d7189ce0f5e625fef4d612ebea (patch)
treeded8e6489c6d3e785f6fa5b5de450f3bca8f79f8 /arch/mips/ralink
parent5aaec657369cb94e6d94ad1c66a264070e78e2b2 (diff)
downloadlinux-7a6ee0bbab2551d7189ce0f5e625fef4d612ebea.tar.xz
mips: dts: ralink: add MT7621 SoC
The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc dual-core CPU, a 5-port 10/100/1000 switch/PHY and one RGMII. Add the devicetrees for GB-PC1 and GB-PC2 devices which use MT7621 SoC. Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Link: https://lore.kernel.org/r/20220315160149.3617-1-arinc.unal@arinc9.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/mips/ralink')
-rw-r--r--arch/mips/ralink/Kconfig5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig
index 120adad51d6a..f9fe15630abb 100644
--- a/arch/mips/ralink/Kconfig
+++ b/arch/mips/ralink/Kconfig
@@ -54,10 +54,15 @@ choice
select HAVE_PCI
select PCI_DRIVERS_GENERIC
select SOC_BUS
+
+ help
+ The MT7621 system-on-a-chip includes an 880 MHz MIPS1004Kc dual-core CPU,
+ a 5-port 10/100/1000 switch/PHY and one RGMII.
endchoice
choice
prompt "Devicetree selection"
+ depends on !SOC_MT7621
default DTB_RT_NONE
help
Select the devicetree.