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authorMatt Redfearn <matt.redfearn@mips.com>2018-02-26 20:02:43 +0300
committerJames Hogan <jhogan@kernel.org>2018-03-09 14:22:46 +0300
commit18ba210a29d08ea96025cb9d19c2eebf65846330 (patch)
tree0b829b9512456512b5e1d9cba56573ee3fa44a71 /arch/mips
parent1690905240fd45cc04e873312df8574631c9f595 (diff)
downloadlinux-18ba210a29d08ea96025cb9d19c2eebf65846330.tar.xz
MIPS: cpu-features.h: Replace __mips_isa_rev with MIPS_ISA_REV
Remove the need to check that __mips_isa_rev is defined by using the newly added MIPS_ISA_REV. Signed-off-by: Matt Redfearn <matt.redfearn@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paul.burton@mips.com> Cc: "Maciej W. Rozycki" <macro@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/18675/ Signed-off-by: James Hogan <jhogan@kernel.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/include/asm/cpu-features.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 721b698bfe3c..5f74590e0bea 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -11,6 +11,7 @@
#include <asm/cpu.h>
#include <asm/cpu-info.h>
+#include <asm/isa-rev.h>
#include <cpu-feature-overrides.h>
/*
@@ -493,7 +494,7 @@
# define cpu_has_perf (cpu_data[0].options & MIPS_CPU_PERF)
#endif
-#if defined(CONFIG_SMP) && defined(__mips_isa_rev) && (__mips_isa_rev >= 6)
+#if defined(CONFIG_SMP) && (MIPS_ISA_REV >= 6)
/*
* Some systems share FTLB RAMs between threads within a core (siblings in
* kernel parlance). This means that FTLB entries may become invalid at almost
@@ -525,7 +526,7 @@
# define cpu_has_shared_ftlb_entries \
(current_cpu_data.options & MIPS_CPU_SHARED_FTLB_ENTRIES)
# endif
-#endif /* SMP && __mips_isa_rev >= 6 */
+#endif /* SMP && MIPS_ISA_REV >= 6 */
#ifndef cpu_has_shared_ftlb_ram
# define cpu_has_shared_ftlb_ram 0