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authorManuel Lauss <manuel.lauss@gmail.com>2014-08-18 19:10:32 +0400
committerRalf Baechle <ralf@linux-mips.org>2014-08-19 15:30:47 +0400
commit293076f300f52e1593b596b3f09ec057ee6e4a36 (patch)
tree38ffecccf807f3fdec7759a5a96b22502bbb4ce5 /arch/mips
parent2727cab25a26a0e65e8d9d247ba5a8e9b3e552c7 (diff)
downloadlinux-293076f300f52e1593b596b3f09ec057ee6e4a36.tar.xz
MIPS: Alchemy: Fix db1200 PSC clock enablement
Enable PSC0 (I2C/SPI) clock and leave PSC1 (Audio) alone. This patch restores functionality to both Audio and I2C/SPI. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/7544/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/alchemy/devboards/db1200.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/mips/alchemy/devboards/db1200.c b/arch/mips/alchemy/devboards/db1200.c
index 776188908dfc..8c13675a12e7 100644
--- a/arch/mips/alchemy/devboards/db1200.c
+++ b/arch/mips/alchemy/devboards/db1200.c
@@ -847,6 +847,7 @@ int __init db1200_dev_setup(void)
pr_warn("DB1200: cant get I2C close to 50MHz\n");
else
clk_set_rate(c, pfc);
+ clk_prepare_enable(c);
clk_put(c);
}
@@ -922,11 +923,6 @@ int __init db1200_dev_setup(void)
}
/* Audio PSC clock is supplied externally. (FIXME: platdata!!) */
- c = clk_get(NULL, "psc1_intclk");
- if (!IS_ERR(c)) {
- clk_prepare_enable(c);
- clk_put(c);
- }
__raw_writel(PSC_SEL_CLK_SERCLK,
(void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
wmb();