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| author | Krish Sadhukhan <krish.sadhukhan@oracle.com> | 2019-02-07 22:05:30 +0300 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2019-03-28 19:27:18 +0300 |
| commit | 711eff3a8fa1d6193139a895524240912011b4dc (patch) | |
| tree | 8d1f2626bf6030735f5f29cdab4d09f3fb098f12 /arch/openrisc | |
| parent | 05d5a48635259e621ea26d01e8316c6feeb34190 (diff) | |
| download | linux-711eff3a8fa1d6193139a895524240912011b4dc.tar.xz | |
kvm: nVMX: Add a vmentry check for HOST_SYSENTER_ESP and HOST_SYSENTER_EIP fields
According to section "Checks on VMX Controls" in Intel SDM vol 3C, the
following check is performed on vmentry of L2 guests:
On processors that support Intel 64 architecture, the IA32_SYSENTER_ESP
field and the IA32_SYSENTER_EIP field must each contain a canonical
address.
Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Reviewed-by: Mihai Carabas <mihai.carabas@oracle.com>
Reviewed-by: Jim Mattson <jmattson@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/openrisc')
0 files changed, 0 insertions, 0 deletions