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authorNicholas Piggin <npiggin@gmail.com>2021-11-23 12:51:49 +0300
committerMichael Ellerman <mpe@ellerman.id.au>2021-11-24 13:08:57 +0300
commit245ebf8e7380b3d84c0aac37fbfd9306b45a3a7a (patch)
treec971581a1e6f91ba65b4b13eef7d6b4781f6b10d /arch/powerpc/kernel/cpu_setup_power.c
parentd3c8a2d3740d93778ea102d4c781746d284177bf (diff)
downloadlinux-245ebf8e7380b3d84c0aac37fbfd9306b45a3a7a.tar.xz
powerpc/64s: Always set PMU control registers to frozen/disabled when not in use
KVM PMU management code looks for particular frozen/disabled bits in the PMU registers so it knows whether it must clear them when coming out of a guest or not. Setting this up helps KVM make these optimisations without getting confused. Longer term the better approach might be to move guest/host PMU switching to the perf subsystem. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Athira Jajeev <atrajeev@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20211123095231.1036501-12-npiggin@gmail.com
Diffstat (limited to 'arch/powerpc/kernel/cpu_setup_power.c')
-rw-r--r--arch/powerpc/kernel/cpu_setup_power.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/kernel/cpu_setup_power.c b/arch/powerpc/kernel/cpu_setup_power.c
index a29dc8326622..3dc61e203f37 100644
--- a/arch/powerpc/kernel/cpu_setup_power.c
+++ b/arch/powerpc/kernel/cpu_setup_power.c
@@ -109,7 +109,7 @@ static void init_PMU_HV_ISA207(void)
static void init_PMU(void)
{
mtspr(SPRN_MMCRA, 0);
- mtspr(SPRN_MMCR0, 0);
+ mtspr(SPRN_MMCR0, MMCR0_FC);
mtspr(SPRN_MMCR1, 0);
mtspr(SPRN_MMCR2, 0);
}
@@ -123,7 +123,7 @@ static void init_PMU_ISA31(void)
{
mtspr(SPRN_MMCR3, 0);
mtspr(SPRN_MMCRA, MMCRA_BHRB_DISABLE);
- mtspr(SPRN_MMCR0, MMCR0_PMCCEXT);
+ mtspr(SPRN_MMCR0, MMCR0_FC | MMCR0_PMCCEXT);
}
/*