diff options
| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2024-04-03 23:35:03 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-04-22 10:45:19 +0300 |
| commit | fc5d2b222ab18612bc7bdfef7f672afd2cd7275b (patch) | |
| tree | 2845605356c9634cfbdaa640223607d136f81354 /arch/riscv | |
| parent | 1731ab2f8b62f0be2073de581ffef6db1196ad4f (diff) | |
| download | linux-fc5d2b222ab18612bc7bdfef7f672afd2cd7275b.tar.xz | |
riscv: dts: renesas: rzfive-smarc-som: Drop deleting interrupt properties from ETH0/1 nodes
Now that we have enabled IRQC support for RZ/Five SoC switch to interrupt
mode for ethernet0/1 PHYs instead of polling mode.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240403203503.634465-6-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/riscv')
| -rw-r--r-- | arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi index 433ab5c6a626..5e808242649e 100644 --- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi +++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi @@ -6,19 +6,3 @@ */ #include <arm64/renesas/rzg2ul-smarc-som.dtsi> - -#if (!SW_ET0_EN_N) -ð0 { - phy0: ethernet-phy@7 { - /delete-property/ interrupt-parent; - /delete-property/ interrupts; - }; -}; -#endif - -ð1 { - phy1: ethernet-phy@7 { - /delete-property/ interrupt-parent; - /delete-property/ interrupts; - }; -}; |