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authorDavid S. Miller <davem@davemloft.net>2016-10-06 08:44:56 +0300
committerDavid S. Miller <davem@davemloft.net>2016-10-06 08:44:56 +0300
commit27f145e74c274fa6e40056f3a8d5dc3563bd7369 (patch)
tree8211bfaa3f0a1079db760f96f9d7ff277f996f62 /arch/sparc/prom
parentcdd4f4c71047cdd28c13891e6e217765ea1c1bdc (diff)
parentaa7bde1a8b49391d34f17905a04c3acf7770283d (diff)
downloadlinux-27f145e74c274fa6e40056f3a8d5dc3563bd7369.tar.xz
Merge branch 'sparc-pcie-perf'
Chris Hyser says: ==================== sparc64: PCIe performance enhancements Ver 2 is redone for 4.8 where commit 00085f1efa387a8ce100e3734920f7639c80caa3 changed DMA attributes from struct pointer to unsigned long. This set of patches initiates a series of PCIe performance enhancement patch submittals. Patch 1/2 enables version 2 of the SPARC sun4v IOMMU I/O address translation services need for subsequent enhancements. Patch 2/2 allows drivers to specify DMA_ATTR_WEAK_ORDERING via DMA attributes to the SPARC DMA mapping routines enabling "relaxed ordering" for the buffer being mapped. [Still relevant write-up] PCI-Express Relaxed Ordering and the Sun SPARC Enterprise M-class Servers https://blogs.oracle.com/olympus/entry/relaxed_ordering ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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