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| author | Qiuxu Zhuo <qiuxu.zhuo@intel.com> | 2018-09-25 03:03:43 +0300 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2018-09-27 17:08:18 +0300 |
| commit | e5276b1ffa97e3883802f40a5e3a167fe1cb1d20 (patch) | |
| tree | c750e672e6d613fcf17c1ec81556eb43fe8622fd /arch/x86/include/asm/mce.h | |
| parent | 93ac57540e9129004b569beee54e50b3519b0b07 (diff) | |
| download | linux-e5276b1ffa97e3883802f40a5e3a167fe1cb1d20.tar.xz | |
x86/mce: Add macros for the corrected error count bit field
The bit field [52:38] of MCi_STATUS contains the corrected error count.
Add {*_SHIFT|*_MASK|*_CEC(c)} macros for it.
[ bp: use GENMASK_ULL. ]
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Aristeu Rozanski <aris@redhat.com>
Cc: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Cc: linux-edac@vger.kernel.org
Cc: x86@kernel.org
Link: https://lkml.kernel.org/r/20180925000343.GB5998@agluck-desk
Diffstat (limited to 'arch/x86/include/asm/mce.h')
| -rw-r--r-- | arch/x86/include/asm/mce.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h index 6f95047179eb..97d6969f9a8a 100644 --- a/arch/x86/include/asm/mce.h +++ b/arch/x86/include/asm/mce.h @@ -39,6 +39,9 @@ #define MCI_STATUS_PCC BIT_ULL(57) /* processor context corrupt */ #define MCI_STATUS_S BIT_ULL(56) /* Signaled machine check */ #define MCI_STATUS_AR BIT_ULL(55) /* Action required */ +#define MCI_STATUS_CEC_SHIFT 38 /* Corrected Error Count */ +#define MCI_STATUS_CEC_MASK GENMASK_ULL(52,38) +#define MCI_STATUS_CEC(c) (((c) & MCI_STATUS_CEC_MASK) >> MCI_STATUS_CEC_SHIFT) /* AMD-specific bits */ #define MCI_STATUS_TCC BIT_ULL(55) /* Task context corrupt */ |