summaryrefslogtreecommitdiff
path: root/arch/x86/include/asm/msr-index.h
diff options
context:
space:
mode:
authorBorislav Petkov (AMD) <bp@alien8.de>2023-06-29 18:43:40 +0300
committerBorislav Petkov (AMD) <bp@alien8.de>2023-07-27 12:07:19 +0300
commit1b5277c0ea0b247393a9c426769fde18cff5e2f6 (patch)
treea7b68ae056148d5304ca880ec781d80bdf41595c /arch/x86/include/asm/msr-index.h
parent79113e4060aba744787a81edb9014f2865193854 (diff)
downloadlinux-1b5277c0ea0b247393a9c426769fde18cff5e2f6.tar.xz
x86/srso: Add SRSO_NO support
Add support for the CPUID flag which denotes that the CPU is not affected by SRSO. Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
-rw-r--r--arch/x86/include/asm/msr-index.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 3aedae61af4f..c81483a3c13d 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -57,6 +57,7 @@
#define MSR_IA32_PRED_CMD 0x00000049 /* Prediction Command */
#define PRED_CMD_IBPB BIT(0) /* Indirect Branch Prediction Barrier */
+#define PRED_CMD_SBPB BIT(7) /* Selective Branch Prediction Barrier */
#define MSR_PPIN_CTL 0x0000004e
#define MSR_PPIN 0x0000004f