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| author | Patrick Delaunay <patrick.delaunay@foss.st.com> | 2024-04-24 19:53:44 +0300 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2024-04-25 16:00:31 +0300 |
| commit | 36cf0d86d760f30b59bc61ffc72c58503c353a17 (patch) | |
| tree | 5f25500e5553b7dd2e21febb10258bef7127bbd7 /arch/x86/include/asm/msr-index.h | |
| parent | bc99659688ba39def8fd43758e9ea88a3c3c9817 (diff) | |
| download | linux-36cf0d86d760f30b59bc61ffc72c58503c353a17.tar.xz | |
arm64: dts: st: correct masks for GIC PPI interrupts on stm32mp25
Using GIC_CPU_MASK_SIMPLE(x), x should reflect the number of CPUs.
STM32MP251 is a single core Cortex A35, STM32MP253 is a dual core CA35.
Fixes: 5d30d03aaf78 ("arm64: dts: st: introduce stm32mp25 SoCs family")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
0 files changed, 0 insertions, 0 deletions