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authorKirill A. Shutemov <kirill.shutemov@linux.intel.com>2023-03-12 14:25:58 +0300
committerDave Hansen <dave.hansen@linux.intel.com>2023-03-16 23:08:39 +0300
commit6449dcb0cac738219d13c618af7fd8664735f99d (patch)
tree246add8daa2a0ee4ab493b3a91c81bb0a4063ebd /arch/x86/include/asm/processor-flags.h
parent5ef495e55f07aa117fdd8e187c9901cefc02fe0a (diff)
downloadlinux-6449dcb0cac738219d13c618af7fd8664735f99d.tar.xz
x86: CPUID and CR3/CR4 flags for Linear Address Masking
Enumerate Linear Address Masking and provide defines for CR3 and CR4 flags. The new CONFIG_ADDRESS_MASKING option enables the feature support in kernel. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Reviewed-by: Alexander Potapenko <glider@google.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Alexander Potapenko <glider@google.com> Link: https://lore.kernel.org/all/20230312112612.31869-4-kirill.shutemov%40linux.intel.com
Diffstat (limited to 'arch/x86/include/asm/processor-flags.h')
-rw-r--r--arch/x86/include/asm/processor-flags.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/include/asm/processor-flags.h b/arch/x86/include/asm/processor-flags.h
index a7f3d9100adb..d8cccadc83a6 100644
--- a/arch/x86/include/asm/processor-flags.h
+++ b/arch/x86/include/asm/processor-flags.h
@@ -28,6 +28,8 @@
* On systems with SME, one bit (in a variable position!) is stolen to indicate
* that the top-level paging structure is encrypted.
*
+ * On systemms with LAM, bits 61 and 62 are used to indicate LAM mode.
+ *
* All of the remaining bits indicate the physical address of the top-level
* paging structure.
*