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| author | Tony Luck <tony.luck@intel.com> | 2022-02-01 02:01:09 +0300 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2022-02-01 18:29:26 +0300 |
| commit | 822ccfade55b6be7977b364356fcf2d78d8a373a (patch) | |
| tree | 801825ff6ecde7e19bad0c0110fccb0cbae18863 /arch/x86/include/asm/processor.h | |
| parent | 00a2f23eef7d1fa6c2dfdc613857b84fbf5e2b3b (diff) | |
| download | linux-822ccfade55b6be7977b364356fcf2d78d8a373a.tar.xz | |
x86/cpu: Read/save PPIN MSR during initialization
Currently, the PPIN (Protected Processor Inventory Number) MSR is read
by every CPU that processes a machine check, CMCI, or just polls machine
check banks from a periodic timer. This is not a "fast" MSR, so this
adds to overhead of processing errors.
Add a new "ppin" field to the cpuinfo_x86 structure. Read and save the
PPIN during initialization. Use this copy in mce_setup() instead of
reading the MSR.
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/20220131230111.2004669-4-tony.luck@intel.com
Diffstat (limited to 'arch/x86/include/asm/processor.h')
| -rw-r--r-- | arch/x86/include/asm/processor.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 2c5f12ae7d04..a87e7c33d5ac 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -119,6 +119,8 @@ struct cpuinfo_x86 { int x86_cache_mbm_width_offset; int x86_power; unsigned long loops_per_jiffy; + /* protected processor identification number */ + u64 ppin; /* cpuid returned max cores value: */ u16 x86_max_cores; u16 apicid; |