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| author | Peter Zijlstra <peterz@infradead.org> | 2022-03-08 18:30:23 +0300 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2022-03-15 12:32:35 +0300 |
| commit | 5b2fc51576eff811a614e33cbbd0c3cb05022892 (patch) | |
| tree | 7e29a5e6c80c12bdc17ff1b832840f16ffcbb658 /arch/x86/include/asm/segment.h | |
| parent | 8b87d8cec1b31ea710568ae49ba5f5146318da0d (diff) | |
| download | linux-5b2fc51576eff811a614e33cbbd0c3cb05022892.tar.xz | |
x86/ibt,xen: Sprinkle the ENDBR
Even though Xen currently doesn't advertise IBT, prepare for when it
will eventually do so and sprinkle the ENDBR dust accordingly.
Even though most of the entry points are IRET like, the CPL0
Hypervisor can set WAIT-FOR-ENDBR and demand ENDBR at these sites.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Josh Poimboeuf <jpoimboe@redhat.com>
Link: https://lore.kernel.org/r/20220308154317.873919996@infradead.org
Diffstat (limited to 'arch/x86/include/asm/segment.h')
| -rw-r--r-- | arch/x86/include/asm/segment.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h index b228c9d44ee7..3a31d4ea61ea 100644 --- a/arch/x86/include/asm/segment.h +++ b/arch/x86/include/asm/segment.h @@ -283,7 +283,7 @@ static inline void vdso_read_cpunode(unsigned *cpu, unsigned *node) * pop %rcx; pop %r11; jmp early_idt_handler_array[i]; summing up to * max 8 bytes. */ -#define XEN_EARLY_IDT_HANDLER_SIZE 8 +#define XEN_EARLY_IDT_HANDLER_SIZE (8 + ENDBR_INSN_SIZE) #ifndef __ASSEMBLY__ |