diff options
| author | Reinette Chatre <reinette.chatre@intel.com> | 2018-06-23 01:42:28 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2018-06-24 16:35:48 +0300 |
| commit | 8a2fc0e1bc0cd856101927188884d7c370b62188 (patch) | |
| tree | 81ff3b5d96ca3c9d8a010862ef496aebb53bd824 /arch/x86/kernel/cpu/intel_rdt_pseudo_lock_event.h | |
| parent | 746e08590b864cf730d7bd23394e2d3fbb0f22b6 (diff) | |
| download | linux-8a2fc0e1bc0cd856101927188884d7c370b62188.tar.xz | |
x86/intel_rdt: More precise L2 hit/miss measurements
Intel Goldmont processors supports non-architectural precise events that
can be used to give us more insight into the success of L2 cache
pseudo-locking on these platforms.
Introduce a new measurement trigger that will enable two precise events,
MEM_LOAD_UOPS_RETIRED.L2_HIT and MEM_LOAD_UOPS_RETIRED.L2_MISS, while
accessing pseudo-locked data. A new tracepoint, pseudo_lock_l2, is
created to make these results visible to the user.
Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: fenghua.yu@intel.com
Cc: tony.luck@intel.com
Cc: vikas.shivappa@linux.intel.com
Cc: gavin.hindman@intel.com
Cc: jithu.joseph@intel.com
Cc: dave.hansen@intel.com
Cc: hpa@zytor.com
Link: https://lkml.kernel.org/r/06b1456da65b543479dac8d9493e41f92f175d6c.1529706536.git.reinette.chatre@intel.com
Diffstat (limited to 'arch/x86/kernel/cpu/intel_rdt_pseudo_lock_event.h')
| -rw-r--r-- | arch/x86/kernel/cpu/intel_rdt_pseudo_lock_event.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock_event.h b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock_event.h index 3cd0fa27d5fe..efad50d2ee2f 100644 --- a/arch/x86/kernel/cpu/intel_rdt_pseudo_lock_event.h +++ b/arch/x86/kernel/cpu/intel_rdt_pseudo_lock_event.h @@ -15,6 +15,16 @@ TRACE_EVENT(pseudo_lock_mem_latency, TP_printk("latency=%u", __entry->latency) ); +TRACE_EVENT(pseudo_lock_l2, + TP_PROTO(u64 l2_hits, u64 l2_miss), + TP_ARGS(l2_hits, l2_miss), + TP_STRUCT__entry(__field(u64, l2_hits) + __field(u64, l2_miss)), + TP_fast_assign(__entry->l2_hits = l2_hits; + __entry->l2_miss = l2_miss;), + TP_printk("hits=%llu miss=%llu", + __entry->l2_hits, __entry->l2_miss)); + #endif /* _TRACE_PSEUDO_LOCK_H */ #undef TRACE_INCLUDE_PATH |