diff options
| author | Borislav Petkov <bp@suse.de> | 2021-09-01 22:40:14 +0300 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2021-09-23 12:15:49 +0300 |
| commit | cbe1de162d8297e941f01ac7dd399a11251352bc (patch) | |
| tree | c2c53cddd8a4223bcf316127f7c4e4688fc1e0eb /arch/x86/kernel/cpu/mce/internal.h | |
| parent | 631adc7b0bbaa1333fc39f0dca5e7584f51d86c9 (diff) | |
| download | linux-cbe1de162d8297e941f01ac7dd399a11251352bc.tar.xz | |
x86/mce: Get rid of machine_check_vector
Get rid of the indirect function pointer and use flags settings instead
to steer execution.
Now that it is not an indirect call any longer, drop the instrumentation
annotation for objtool too.
No functional changes.
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lkml.kernel.org/r/20210922165101.18951-3-bp@alien8.de
Diffstat (limited to 'arch/x86/kernel/cpu/mce/internal.h')
| -rw-r--r-- | arch/x86/kernel/cpu/mce/internal.h | 29 |
1 files changed, 24 insertions, 5 deletions
diff --git a/arch/x86/kernel/cpu/mce/internal.h b/arch/x86/kernel/cpu/mce/internal.h index 09cb5ab9a81d..d71d6c5c3ef0 100644 --- a/arch/x86/kernel/cpu/mce/internal.h +++ b/arch/x86/kernel/cpu/mce/internal.h @@ -8,9 +8,6 @@ #include <linux/device.h> #include <asm/mce.h> -/* Pointer to the installed machine check handler for this CPU setup. */ -extern void (*machine_check_vector)(struct pt_regs *); - enum severity_level { MCE_NO_SEVERITY, MCE_DEFERRED_SEVERITY, @@ -126,7 +123,9 @@ struct mca_config { ser : 1, recovery : 1, bios_cmci_threshold : 1, - __reserved : 59; + /* Proper #MC exception handler is set */ + initialized : 1, + __reserved : 58; s8 bootlog; int tolerant; @@ -162,7 +161,13 @@ struct mce_vendor_flags { /* AMD-style error thresholding banks present. */ amd_threshold : 1, - __reserved_0 : 60; + /* Pentium, family 5-style MCA */ + p5 : 1, + + /* Centaur Winchip C6-style MCA */ + winchip : 1, + + __reserved_0 : 58; }; extern struct mce_vendor_flags mce_flags; @@ -195,4 +200,18 @@ __visible bool ex_handler_wrmsr_fault(const struct exception_table_entry *fixup, unsigned long error_code, unsigned long fault_addr); +#ifdef CONFIG_X86_ANCIENT_MCE +void intel_p5_mcheck_init(struct cpuinfo_x86 *c); +void winchip_mcheck_init(struct cpuinfo_x86 *c); +noinstr void pentium_machine_check(struct pt_regs *regs); +noinstr void winchip_machine_check(struct pt_regs *regs); +static inline void enable_p5_mce(void) { mce_p5_enabled = 1; } +#else +static inline void intel_p5_mcheck_init(struct cpuinfo_x86 *c) {} +static inline void winchip_mcheck_init(struct cpuinfo_x86 *c) {} +static inline void enable_p5_mce(void) {} +static inline void pentium_machine_check(struct pt_regs *regs) {} +static inline void winchip_machine_check(struct pt_regs *regs) {} +#endif + #endif /* __X86_MCE_INTERNAL_H__ */ |