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| author | Daniel Sneddon <daniel.sneddon@linux.intel.com> | 2024-03-13 19:49:17 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2024-04-08 20:27:06 +0300 |
| commit | ed2e8d49b54d677f3123668a21a57822d679651f (patch) | |
| tree | a02e7e6de4f14de1f371e3feb0bc68cada3d4ddc /arch/x86/kernel/cpu | |
| parent | 95a6ccbdc7199a14b71ad8901cb788ba7fb5167b (diff) | |
| download | linux-ed2e8d49b54d677f3123668a21a57822d679651f.tar.xz | |
KVM: x86: Add BHI_NO
Intel processors that aren't vulnerable to BHI will set
MSR_IA32_ARCH_CAPABILITIES[BHI_NO] = 1;. Guests may use this BHI_NO bit to
determine if they need to implement BHI mitigations or not. Allow this bit
to be passed to the guests.
Signed-off-by: Daniel Sneddon <daniel.sneddon@linux.intel.com>
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Daniel Sneddon <daniel.sneddon@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Reviewed-by: Josh Poimboeuf <jpoimboe@kernel.org>
Diffstat (limited to 'arch/x86/kernel/cpu')
0 files changed, 0 insertions, 0 deletions