summaryrefslogtreecommitdiff
path: root/arch/x86/kernel/jailhouse.c
diff options
context:
space:
mode:
authorJan Kiszka <jan.kiszka@siemens.com>2017-11-27 11:11:47 +0300
committerThomas Gleixner <tglx@linutronix.de>2018-01-14 23:11:55 +0300
commit11c8dc419bbc7b5acef812043feefc53c45ef558 (patch)
treeecd778bfebf7fca260fe364cf1992f973329ef3f /arch/x86/kernel/jailhouse.c
parent4a362601baa6fff92b576d85199f1948cec2fb3b (diff)
downloadlinux-11c8dc419bbc7b5acef812043feefc53c45ef558.tar.xz
x86/jailhouse: Enable APIC and SMP support
Register the APIC which Jailhouse always exposes at 0xfee00000 if in xAPIC mode or via MSRs as x2APIC. The latter is only available if it was already activated because there is no support for switching its mode during runtime. Jailhouse requires the APIC to be operated in phys-flat mode. Ensure that this mode is selected by Linux. The available CPUs are taken from the setup data structure that the loader filled and registered with the kernel. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: jailhouse-dev@googlegroups.com Link: https://lkml.kernel.org/r/8b2255da0a9856c530293a67aa9d6addfe102a2b.1511770314.git.jan.kiszka@siemens.com
Diffstat (limited to 'arch/x86/kernel/jailhouse.c')
-rw-r--r--arch/x86/kernel/jailhouse.c42
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c
index 1186b8909595..57f49963d8dc 100644
--- a/arch/x86/kernel/jailhouse.c
+++ b/arch/x86/kernel/jailhouse.c
@@ -9,6 +9,7 @@
*/
#include <linux/kernel.h>
+#include <asm/apic.h>
#include <asm/cpu.h>
#include <asm/hypervisor.h>
#include <asm/setup.h>
@@ -29,12 +30,43 @@ static uint32_t __init jailhouse_detect(void)
return jailhouse_cpuid_base();
}
+static void __init jailhouse_get_smp_config(unsigned int early)
+{
+ unsigned int cpu;
+
+ if (x2apic_enabled()) {
+ /*
+ * We do not have access to IR inside Jailhouse non-root cells.
+ * So we have to run in physical mode.
+ */
+ x2apic_phys = 1;
+
+ /*
+ * This will trigger the switch to apic_x2apic_phys.
+ * Empty OEM IDs ensure that only this APIC driver picks up
+ * the call.
+ */
+ default_acpi_madt_oem_check("", "");
+ }
+
+ register_lapic_address(0xfee00000);
+
+ for (cpu = 0; cpu < setup_data.num_cpus; cpu++) {
+ generic_processor_info(setup_data.cpu_ids[cpu],
+ boot_cpu_apic_version);
+ }
+
+ smp_found_config = 1;
+}
+
static void __init jailhouse_init_platform(void)
{
u64 pa_data = boot_params.hdr.setup_data;
struct setup_data header;
void *mapping;
+ x86_init.mpparse.get_smp_config = jailhouse_get_smp_config;
+
while (pa_data) {
mapping = early_memremap(pa_data, sizeof(header));
memcpy(&header, mapping, sizeof(header));
@@ -66,8 +98,18 @@ bool jailhouse_paravirt(void)
return jailhouse_cpuid_base() != 0;
}
+static bool jailhouse_x2apic_available(void)
+{
+ /*
+ * The x2APIC is only available if the root cell enabled it. Jailhouse
+ * does not support switching between xAPIC and x2APIC.
+ */
+ return x2apic_enabled();
+}
+
const struct hypervisor_x86 x86_hyper_jailhouse __refconst = {
.name = "Jailhouse",
.detect = jailhouse_detect,
.init.init_platform = jailhouse_init_platform,
+ .init.x2apic_available = jailhouse_x2apic_available,
};