diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2023-08-09 01:03:45 +0300 |
|---|---|---|
| committer | Dave Hansen <dave.hansen@linux.intel.com> | 2023-08-09 21:58:18 +0300 |
| commit | d10a904435fa63fccc740e750e32b80e5f63c6c8 (patch) | |
| tree | c23ec2adff2db973fd951de171b1c28b6a1e034f /arch/x86/kernel/mpparse.c | |
| parent | 1d90c9f7313011b67643228810435038d20b0744 (diff) | |
| download | linux-d10a904435fa63fccc740e750e32b80e5f63c6c8.tar.xz | |
x86/apic: Consolidate boot_cpu_physical_apicid initialization sites
boot_cpu_physical_apicid is written in random places and in the last
consequence filled with the APIC ID read from the local APIC. That causes
it to have inconsistent state when the MPTABLE is broken. As a consequence
tons of moronic checks are sprinkled all over the place.
Consolidate the code and read it exactly once when either X2APIC mode is
detected early or when the APIC mapping is established.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: Michael Kelley <mikelley@microsoft.com>
Tested-by: Sohil Mehta <sohil.mehta@intel.com>
Tested-by: Juergen Gross <jgross@suse.com> # Xen PV (dom0 and unpriv. guest)
Diffstat (limited to 'arch/x86/kernel/mpparse.c')
| -rw-r--r-- | arch/x86/kernel/mpparse.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c index fed721f90116..fe9a7f63d2d9 100644 --- a/arch/x86/kernel/mpparse.c +++ b/arch/x86/kernel/mpparse.c @@ -58,10 +58,8 @@ static void __init MP_processor_info(struct mpc_cpu *m) apicid = m->apicid; - if (m->cpuflag & CPU_BOOTPROCESSOR) { + if (m->cpuflag & CPU_BOOTPROCESSOR) bootup_cpu = " (Bootup-CPU)"; - boot_cpu_physical_apicid = m->apicid; - } pr_info("Processor #%d%s\n", m->apicid, bootup_cpu); generic_processor_info(apicid, m->apicver); |