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authorDavid Cohen <david.a.cohen@linux.intel.com>2013-12-17 00:07:38 +0400
committerH. Peter Anvin <hpa@linux.intel.com>2014-01-16 02:38:58 +0400
commitbc20aa48bbb3068224a1c91f8332971fdb689fad (patch)
treef1a4b0e72b921027c590e56d215638c402b625b3 /arch/x86/pci
parent85611e3febe78955a519f5f9eb47b941525c8c76 (diff)
downloadlinux-bc20aa48bbb3068224a1c91f8332971fdb689fad.tar.xz
x86, intel-mid: Add Merrifield platform support
This code was partially based on Mark Brown's previous work. Signed-off-by: David Cohen <david.a.cohen@linux.intel.com> Link: http://lkml.kernel.org/r/1387224459-25746-4-git-send-email-david.a.cohen@linux.intel.com Signed-off-by: Fei Yang <fei.yang@intel.com> Cc: Mark F. Brown <mark.f.brown@intel.com> Cc: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/x86/pci')
-rw-r--r--arch/x86/pci/intel_mid_pci.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c
index 51384ca727ad..84b9d672843d 100644
--- a/arch/x86/pci/intel_mid_pci.c
+++ b/arch/x86/pci/intel_mid_pci.c
@@ -31,6 +31,7 @@
#include <asm/pci_x86.h>
#include <asm/hw_irq.h>
#include <asm/io_apic.h>
+#include <asm/intel-mid.h>
#define PCIE_CAP_OFFSET 0x100
@@ -219,7 +220,10 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
irq_attr.ioapic = mp_find_ioapic(dev->irq);
irq_attr.ioapic_pin = dev->irq;
irq_attr.trigger = 1; /* level */
- irq_attr.polarity = 1; /* active low */
+ if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER)
+ irq_attr.polarity = 0; /* active high */
+ else
+ irq_attr.polarity = 1; /* active low */
io_apic_set_pci_routing(&dev->dev, dev->irq, &irq_attr);
return 0;