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| author | Alex Helms <alexander.helms.jy@renesas.com> | 2022-09-12 21:36:13 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2022-10-01 03:34:35 +0300 |
| commit | 48c5e98fedd9e0b164df4de592fd740537ead9e2 (patch) | |
| tree | fff3052e2ae08d04e60d8e87671dcb990e4b8d3d /drivers/clk/Kconfig | |
| parent | 09d1855656dad04127aee195baf2eedae029175d (diff) | |
| download | linux-48c5e98fedd9e0b164df4de592fd740537ead9e2.tar.xz | |
clk: Renesas versaclock7 ccf device driver
Renesas Versaclock7 is a family of configurable clock generator ICs
with fractional and integer dividers. This driver has basic support
for the RC21008A device, a clock synthesizer with a crystal input and
8 outputs. The supports changing the FOD and IOD rates, and each
output can be gated.
Signed-off-by: Alex Helms <alexander.helms.jy@renesas.com>
Link: https://lore.kernel.org/r/20220912183613.22213-3-alexander.helms.jy@renesas.com
Tested-by: Saeed Nowshadi <saeed.nowshadi@amd.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/Kconfig')
| -rw-r--r-- | drivers/clk/Kconfig | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 48f8f4221e21..87481e4fa746 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -377,6 +377,15 @@ config COMMON_CLK_VC5 This driver supports the IDT VersaClock 5 and VersaClock 6 programmable clock generators. +config COMMON_CLK_VC7 + tristate "Clock driver for Renesas Versaclock 7 devices" + depends on I2C + depends on OF + select REGMAP_I2C + help + Renesas Versaclock7 is a family of configurable clock generator + and jitter attenuator ICs with fractional and integer dividers. + config COMMON_CLK_STM32MP135 def_bool COMMON_CLK && MACH_STM32MP13 help |