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author | Yinbo Zhu <zhuyinbo@loongson.cn> | 2023-03-23 05:52:29 +0300 |
---|---|---|
committer | Stephen Boyd <sboyd@kernel.org> | 2023-03-27 22:15:26 +0300 |
commit | acc0ccffec502be0d64f477d4341957a897e4283 (patch) | |
tree | 8829b4a195d6a1bd441c1273d8ed332c5940fc3f /drivers/clk/Makefile | |
parent | d8c0ee307a6086299157ce8eddec9aef478ef475 (diff) | |
download | linux-acc0ccffec502be0d64f477d4341957a897e4283.tar.xz |
clk: clk-loongson2: add clock controller driver support
This driver provides support for clock controller on Loongson-2 SoC,
the Loongson-2 SoC uses a 100MHz clock as the PLL reference clock,
there are five independent PLLs inside, each of which PLL can
provide up to three sets of frequency dependent clock outputs.
Signed-off-by: Yinbo Zhu <zhuyinbo@loongson.cn>
Link: https://lore.kernel.org/r/20230323025229.2971-2-zhuyinbo@loongson.cn
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/Makefile')
-rw-r--r-- | drivers/clk/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 417bc27ab6e8..fd9d0d51190d 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -44,6 +44,7 @@ obj-$(CONFIG_LMK04832) += clk-lmk04832.o obj-$(CONFIG_COMMON_CLK_LAN966X) += clk-lan966x.o obj-$(CONFIG_COMMON_CLK_LOCHNAGAR) += clk-lochnagar.o obj-$(CONFIG_MACH_LOONGSON32) += clk-loongson1.o +obj-$(CONFIG_COMMON_CLK_LOONGSON2) += clk-loongson2.o obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o obj-$(CONFIG_COMMON_CLK_MAX9485) += clk-max9485.o obj-$(CONFIG_ARCH_MILBEAUT_M10V) += clk-milbeaut.o |