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| author | Max Filippov <jcmvbkbc@gmail.com> | 2015-01-12 10:20:46 +0300 |
|---|---|---|
| committer | Michael Turquette <mturquette@linaro.org> | 2015-01-18 00:52:40 +0300 |
| commit | 0c7665c356021c10c3f45a620f3f12ad599850d5 (patch) | |
| tree | 49dd4d6f3f2d94cfe8fbfd2713adbc1dcdd7c318 /drivers/clk/clk-gate.c | |
| parent | c7662fc59ca38517e0ec04ceaa123ed8209ab6bf (diff) | |
| download | linux-0c7665c356021c10c3f45a620f3f12ad599850d5.tar.xz | |
clk: TI CDCE706 clock synthesizer driver
The driver allows using CDCE706 in its default configuration recorded in
EEPROM and adjusting of synthesized clocks by consumers.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/clk-gate.c')
0 files changed, 0 insertions, 0 deletions