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authorSergej Sawazki <sergej@taudac.com>2017-09-16 14:44:41 +0300
committerStephen Boyd <sboyd@codeaurora.org>2017-12-22 05:09:18 +0300
commit51279ef9f64cf7eb8b3f891a2b60fa1aa4938afc (patch)
tree8406d6a2eb541671c99e636161023430a01054df /drivers/clk/clk-si5351.c
parent758231d5a80a784d60ce7c96b27f8771ca4c682b (diff)
downloadlinux-51279ef9f64cf7eb8b3f891a2b60fa1aa4938afc.tar.xz
clk: si5351: Add DT property to enable PLL reset
Add optional output clock DT property to enable PLL reset when a clock output is enabled. Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Rabeeh Khoury <rabeeh@solid-run.com> Cc: Russell King <linux@armlinux.org.uk> Signed-off-by: Sergej Sawazki <sergej@taudac.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/clk-si5351.c')
-rw-r--r--drivers/clk/clk-si5351.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c
index 36a15f161dfd..f63fcc0d8cf5 100644
--- a/drivers/clk/clk-si5351.c
+++ b/drivers/clk/clk-si5351.c
@@ -1297,6 +1297,9 @@ static int si5351_dt_parse(struct i2c_client *client,
pdata->clkout[num].pll_master =
of_property_read_bool(child, "silabs,pll-master");
+
+ pdata->clkout[num].pll_reset =
+ of_property_read_bool(child, "silabs,pll-reset");
}
client->dev.platform_data = pdata;