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authorAnson Huang <anson.huang@nxp.com>2019-05-15 04:29:57 +0300
committerShawn Guo <shawnguo@kernel.org>2019-05-23 10:29:39 +0300
commit75ebf69445dde8f0cec13ce1086893c835a4e460 (patch)
tree6fc4b6435cb5b9d52cb78e9f71f63843a680fc21 /drivers/clk/imx/clk-imx8mm.c
parent2b2ebb9acb89cf968bb08b488362383ae795e6b1 (diff)
downloadlinux-75ebf69445dde8f0cec13ce1086893c835a4e460.tar.xz
clk: imx8mm: add SNVS clock to clock tree
i.MX8MM has clock gate for SNVS module, add it into clock tree for SNVS RTC driver to manage. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk/imx/clk-imx8mm.c')
-rw-r--r--drivers/clk/imx/clk-imx8mm.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index 733ca20b72a5..7ffbd6e37eed 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -622,6 +622,7 @@ static int __init imx8mm_clocks_init(struct device_node *ccm_node)
clks[IMX8MM_CLK_SAI5_IPG] = imx_clk_gate2_shared2("sai5_ipg_clk", "ipg_audio_root", base + 0x4370, 0, &share_count_sai5);
clks[IMX8MM_CLK_SAI6_ROOT] = imx_clk_gate2_shared2("sai6_root_clk", "sai6", base + 0x4380, 0, &share_count_sai6);
clks[IMX8MM_CLK_SAI6_IPG] = imx_clk_gate2_shared2("sai6_ipg_clk", "ipg_audio_root", base + 0x4380, 0, &share_count_sai6);
+ clks[IMX8MM_CLK_SNVS_ROOT] = imx_clk_gate4("snvs_root_clk", "ipg_root", base + 0x4470, 0);
clks[IMX8MM_CLK_UART1_ROOT] = imx_clk_gate4("uart1_root_clk", "uart1", base + 0x4490, 0);
clks[IMX8MM_CLK_UART2_ROOT] = imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0);
clks[IMX8MM_CLK_UART3_ROOT] = imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0);