diff options
| author | Neil Armstrong <narmstrong@baylibre.com> | 2019-08-26 10:25:36 +0300 |
|---|---|---|
| committer | Jerome Brunet <jbrunet@baylibre.com> | 2019-08-26 12:03:38 +0300 |
| commit | 3dd02b7334ecdea6cd5b0bd371a9c958f326c1ce (patch) | |
| tree | 973c117734c83eee768b840f21e1d0cbb8802c35 /drivers/clk/meson/g12a.h | |
| parent | 1db61d5eda74e65ee5313b9cc0c1bdc8f570d362 (diff) | |
| download | linux-3dd02b7334ecdea6cd5b0bd371a9c958f326c1ce.tar.xz | |
clk: meson: g12a: add support for SM1 GP1 PLL
Add the new GP1 PLL for the Amlogic SM1 SoC, used to feed the new
DynamIQ Shared Unit of the ARM Cores Complex.
This also adds a dedicated set of clock and compatible for SM1.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Diffstat (limited to 'drivers/clk/meson/g12a.h')
| -rw-r--r-- | drivers/clk/meson/g12a.h | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/clk/meson/g12a.h b/drivers/clk/meson/g12a.h index 559a34cfdfeb..e426b4121b7a 100644 --- a/drivers/clk/meson/g12a.h +++ b/drivers/clk/meson/g12a.h @@ -29,6 +29,14 @@ #define HHI_GP0_PLL_CNTL5 0x054 #define HHI_GP0_PLL_CNTL6 0x058 #define HHI_GP0_PLL_STS 0x05C +#define HHI_GP1_PLL_CNTL0 0x060 +#define HHI_GP1_PLL_CNTL1 0x064 +#define HHI_GP1_PLL_CNTL2 0x068 +#define HHI_GP1_PLL_CNTL3 0x06C +#define HHI_GP1_PLL_CNTL4 0x070 +#define HHI_GP1_PLL_CNTL5 0x074 +#define HHI_GP1_PLL_CNTL6 0x078 +#define HHI_GP1_PLL_STS 0x07C #define HHI_PCIE_PLL_CNTL0 0x098 #define HHI_PCIE_PLL_CNTL1 0x09C #define HHI_PCIE_PLL_CNTL2 0x0A0 @@ -233,8 +241,9 @@ #define CLKID_CPUB_CLK_AXI 239 #define CLKID_CPUB_CLK_TRACE_SEL 240 #define CLKID_CPUB_CLK_TRACE 241 +#define CLKID_GP1_PLL_DCO 242 -#define NR_CLKS 242 +#define NR_CLKS 244 /* include the CLKIDs that have been made part of the DT binding */ #include <dt-bindings/clock/g12a-clkc.h> |