diff options
author | Jakub Kicinski <kuba@kernel.org> | 2024-03-22 02:14:13 +0300 |
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committer | Jakub Kicinski <kuba@kernel.org> | 2024-03-22 02:15:08 +0300 |
commit | 537c2e91d3549e5d6020bb0576cf9b54a845255f (patch) | |
tree | c09e8a1b7d733cde19b0c72678c28fb2bc97ff6b /drivers/clk/qcom/gcc-ipq5018.c | |
parent | 237bb5f7f7f55ec5f773469a974c61a49c298625 (diff) | |
parent | cba9ffdb9913dfe6be29f049ce920ce451ce7cc4 (diff) | |
download | linux-537c2e91d3549e5d6020bb0576cf9b54a845255f.tar.xz |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Cross-merge networking fixes after downstream PR.
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/clk/qcom/gcc-ipq5018.c')
-rw-r--r-- | drivers/clk/qcom/gcc-ipq5018.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/clk/qcom/gcc-ipq5018.c b/drivers/clk/qcom/gcc-ipq5018.c index 4aba47e8700d..c1732d70e3a2 100644 --- a/drivers/clk/qcom/gcc-ipq5018.c +++ b/drivers/clk/qcom/gcc-ipq5018.c @@ -857,6 +857,7 @@ static struct clk_rcg2 lpass_sway_clk_src = { static const struct freq_tbl ftbl_pcie0_aux_clk_src[] = { F(2000000, P_XO, 12, 0, 0), + { } }; static struct clk_rcg2 pcie0_aux_clk_src = { @@ -1099,6 +1100,7 @@ static const struct freq_tbl ftbl_qpic_io_macro_clk_src[] = { F(100000000, P_GPLL0, 8, 0, 0), F(200000000, P_GPLL0, 4, 0, 0), F(320000000, P_GPLL0, 2.5, 0, 0), + { } }; static struct clk_rcg2 qpic_io_macro_clk_src = { @@ -1194,6 +1196,7 @@ static struct clk_rcg2 ubi0_axi_clk_src = { static const struct freq_tbl ftbl_ubi0_core_clk_src[] = { F(850000000, P_UBI32_PLL, 1, 0, 0), F(1000000000, P_UBI32_PLL, 1, 0, 0), + { } }; static struct clk_rcg2 ubi0_core_clk_src = { @@ -1754,7 +1757,7 @@ static struct clk_branch gcc_gmac0_sys_clk = { .halt_check = BRANCH_HALT_DELAY, .halt_bit = 31, .clkr = { - .enable_reg = 0x683190, + .enable_reg = 0x68190, .enable_mask = BIT(0), .hw.init = &(struct clk_init_data) { .name = "gcc_gmac0_sys_clk", @@ -2180,7 +2183,7 @@ static struct clk_branch gcc_pcie1_axi_s_clk = { }; static struct clk_branch gcc_pcie1_pipe_clk = { - .halt_reg = 8, + .halt_reg = 0x76018, .halt_check = BRANCH_HALT_DELAY, .halt_bit = 31, .clkr = { @@ -3632,7 +3635,7 @@ static const struct qcom_reset_map gcc_ipq5018_resets[] = { [GCC_SYSTEM_NOC_BCR] = { 0x26000, 0 }, [GCC_TCSR_BCR] = { 0x28000, 0 }, [GCC_TLMM_BCR] = { 0x34000, 0 }, - [GCC_UBI0_AXI_ARES] = { 0x680}, + [GCC_UBI0_AXI_ARES] = { 0x68010, 0 }, [GCC_UBI0_AHB_ARES] = { 0x68010, 1 }, [GCC_UBI0_NC_AXI_ARES] = { 0x68010, 2 }, [GCC_UBI0_DBG_ARES] = { 0x68010, 3 }, |