diff options
| author | Johan Hovold <johan+linaro@kernel.org> | 2022-05-20 13:09:47 +0300 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2022-06-26 06:38:02 +0300 |
| commit | 77ea2bd72da4f61f59ad2e839babe83849f35dea (patch) | |
| tree | a290ed4e88079efab620d47fbeb1affc4666c8f5 /drivers/clk/qcom/gdsc.c | |
| parent | e73cb8527c597598599119fcd9c7d1752d9e9fd7 (diff) | |
| download | linux-77ea2bd72da4f61f59ad2e839babe83849f35dea.tar.xz | |
clk: qcom: gdsc: add support for collapse-vote registers
Recent Qualcomm platforms have APCS collapse-vote registers that allow
for sharing GDSCs with other masters (e.g. LPASS).
Add support for using such vote registers instead of the control
register when updating the GDSC power state.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220520100948.19622-3-johan+linaro@kernel.org
Diffstat (limited to 'drivers/clk/qcom/gdsc.c')
| -rw-r--r-- | drivers/clk/qcom/gdsc.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index c676416e685f..6f746158d28f 100644 --- a/drivers/clk/qcom/gdsc.c +++ b/drivers/clk/qcom/gdsc.c @@ -137,8 +137,13 @@ static int gdsc_update_collapse_bit(struct gdsc *sc, bool val) u32 reg, mask; int ret; - reg = sc->gdscr; - mask = SW_COLLAPSE_MASK; + if (sc->collapse_mask) { + reg = sc->collapse_ctrl; + mask = sc->collapse_mask; + } else { + reg = sc->gdscr; + mask = SW_COLLAPSE_MASK; + } ret = regmap_update_bits(sc->regmap, reg, mask, val ? mask : 0); if (ret) |