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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-07-05 10:20:22 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-07-05 10:20:22 +0300 |
| commit | ce05f30dc3a04ca32f91f9fd2a3de7e0b52b0417 (patch) | |
| tree | 4917d1d2482e30985f9ca0ccf51a52ea8320db6c /drivers/clk/renesas/r9a07g043-cpg.c | |
| parent | 080bcd8d5997b1a615e17cab02bd9d16d1d4fbf3 (diff) | |
| parent | 668d361c9d893be3cbd4f3650e1934a62b204def (diff) | |
| download | linux-ce05f30dc3a04ca32f91f9fd2a3de7e0b52b0417.tar.xz | |
Merge tag 'renesas-r9a07g043-dt-binding-defs-tag2' into HEAD
Renesas RZ/Five DT Binding Definitions
Clock and reset definitions for the Renesas RZ/Five (R9A07G043) SoC,
shared by driver and DT source files.
Diffstat (limited to 'drivers/clk/renesas/r9a07g043-cpg.c')
0 files changed, 0 insertions, 0 deletions