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| author | Xingyu Wu <xingyu.wu@starfivetech.com> | 2023-07-13 14:38:58 +0300 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2023-07-19 20:08:00 +0300 |
| commit | a097a5ec14dff59568b1e6c8bd8cc37a21d8811f (patch) | |
| tree | efb36e0ae95e319985148b93dac7c3d888e8c30a /drivers/clk/starfive | |
| parent | 9b3938c0b81e79e1c0e1a3e95be3e12efd8c771b (diff) | |
| download | linux-a097a5ec14dff59568b1e6c8bd8cc37a21d8811f.tar.xz | |
dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator
Add bindings for the Video-Output clock and reset generator (VOUTCRG)
on the JH7110 RISC-V SoC by StarFive Ltd.
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'drivers/clk/starfive')
0 files changed, 0 insertions, 0 deletions