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authorMasahiro Yamada <yamada.masahiro@socionext.com>2017-10-13 15:54:46 +0300
committerStephen Boyd <sboyd@codeaurora.org>2017-10-24 11:57:24 +0300
commitdb9d79f6e7de3e059d897234f93cbe1e55a0ed50 (patch)
treedbc0de52d0bc6ad461f3a294374bbcda06c5faa8 /drivers/clk/uniphier
parent5dcbeca615ef12047a5f4097b91030cbf995b1d2 (diff)
downloadlinux-db9d79f6e7de3e059d897234f93cbe1e55a0ed50.tar.xz
clk: uniphier: fix clock data for PXs3
Fix reg offsets of USB clocks. Fixes: 736de651a836 ("clk: uniphier: add PXs3 clock data") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/uniphier')
-rw-r--r--drivers/clk/uniphier/clk-uniphier-sys.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c
index 0e396f3da526..07f3b91a7daf 100644
--- a/drivers/clk/uniphier/clk-uniphier-sys.c
+++ b/drivers/clk/uniphier/clk-uniphier-sys.c
@@ -233,9 +233,9 @@ const struct uniphier_clk_data uniphier_pxs3_sys_clk_data[] = {
UNIPHIER_LD20_SYS_CLK_SD,
UNIPHIER_LD11_SYS_CLK_NAND(2),
UNIPHIER_LD11_SYS_CLK_EMMC(4),
- UNIPHIER_CLK_GATE("usb30", 12, NULL, 0x2104, 4), /* =GIO0 */
- UNIPHIER_CLK_GATE("usb31-0", 13, NULL, 0x2104, 5), /* =GIO1 */
- UNIPHIER_CLK_GATE("usb31-1", 14, NULL, 0x2104, 6), /* =GIO1-1 */
+ UNIPHIER_CLK_GATE("usb30", 12, NULL, 0x210c, 4), /* =GIO0 */
+ UNIPHIER_CLK_GATE("usb31-0", 13, NULL, 0x210c, 5), /* =GIO1 */
+ UNIPHIER_CLK_GATE("usb31-1", 14, NULL, 0x210c, 6), /* =GIO1-1 */
UNIPHIER_CLK_GATE("usb30-phy0", 16, NULL, 0x210c, 16),
UNIPHIER_CLK_GATE("usb30-phy1", 17, NULL, 0x210c, 18),
UNIPHIER_CLK_GATE("usb30-phy2", 18, NULL, 0x210c, 20),