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authorUlf Hansson <ulf.hansson@linaro.org>2012-10-22 17:58:01 +0400
committerMike Turquette <mturquette@linaro.org>2012-11-10 05:05:33 +0400
commit4a0ae7befc92765c05b4bdd79e931a2058ea9fb7 (patch)
treecda4c43233250628525b336d797677a5bdbbc033 /drivers/clk/ux500
parent86497f54556d70df60ef3030bddcb544f1fb8746 (diff)
downloadlinux-4a0ae7befc92765c05b4bdd79e931a2058ea9fb7.tar.xz
clk: ux500: Register slimbus clock lookups for u8500
At the same time the prcc bit for the kclk is corrected to bit 8 instead of 3. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/ux500')
-rw-r--r--drivers/clk/ux500/u8500_clk.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c
index 668839ff67f5..4ec6f60e3725 100644
--- a/drivers/clk/ux500/u8500_clk.c
+++ b/drivers/clk/ux500/u8500_clk.c
@@ -257,6 +257,7 @@ void u8500_clk_init(void)
clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", U8500_CLKRST1_BASE,
BIT(8), 0);
+ clk_register_clkdev(clk, "apb_pclk", "slimbus0");
clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", U8500_CLKRST1_BASE,
BIT(9), 0);
@@ -444,8 +445,8 @@ void u8500_clk_init(void)
clk_register_clkdev(clk, NULL, "nmk-i2c.2");
clk = clk_reg_prcc_kclk("p1_slimbus0_kclk", "slimclk",
- U8500_CLKRST1_BASE, BIT(3), CLK_SET_RATE_GATE);
- /* FIXME: Redefinition of BIT(3). */
+ U8500_CLKRST1_BASE, BIT(8), CLK_SET_RATE_GATE);
+ clk_register_clkdev(clk, NULL, "slimbus0");
clk = clk_reg_prcc_kclk("p1_i2c4_kclk", "i2cclk",
U8500_CLKRST1_BASE, BIT(9), CLK_SET_RATE_GATE);