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authorVictoria Milhoan <vicki.milhoan@freescale.com>2015-08-05 21:28:36 +0300
committerHerbert Xu <herbert@gondor.apana.org.au>2015-08-10 18:18:56 +0300
commit509da8fda4f06d7914dbada7af121c9f00284173 (patch)
tree427139a1e1513a4b186d03d0b3d89db75df27455 /drivers/crypto/caam/ctrl.c
parente7472422392461f59bc5d7ddd8542c6a48740336 (diff)
downloadlinux-509da8fda4f06d7914dbada7af121c9f00284173.tar.xz
crypto: caam - Add setbits32/clrbits32/clrsetbits primitives for ARM compatibility
Add set/clear 32-bit primitives for compatibility with ARM devices since the primitives were previously only defined for the Power architecture. Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com> Tested-by: Horia Geantă <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/caam/ctrl.c')
-rw-r--r--drivers/crypto/caam/ctrl.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index 189180976167..660cc3edd4a7 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -445,9 +445,9 @@ static int caam_probe(struct platform_device *pdev)
* Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel,
* long pointers in master configuration register
*/
- clrsetbits_be32(&ctrl->mcr, MCFGR_AWCACHE_MASK, MCFGR_AWCACHE_CACH |
- MCFGR_WDENABLE | (sizeof(dma_addr_t) == sizeof(u64) ?
- MCFGR_LONG_PTR : 0));
+ clrsetbits_32(&ctrl->mcr, MCFGR_AWCACHE_MASK, MCFGR_AWCACHE_CACH |
+ MCFGR_WDENABLE | (sizeof(dma_addr_t) == sizeof(u64) ?
+ MCFGR_LONG_PTR : 0));
/*
* Read the Compile Time paramters and SCFGR to determine