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author | Randy Dunlap <rdunlap@infradead.org> | 2023-01-25 06:22:21 +0300 |
---|---|---|
committer | Dan Williams <dan.j.williams@intel.com> | 2023-01-27 02:57:42 +0300 |
commit | cbbd05d036e91b9dd976af4382f6c8d91b69b38a (patch) | |
tree | 2acedd2670763546efd4fe74b99560548bfb35d3 /drivers/cxl/core/port.c | |
parent | 66f3cb7993c2729b72e20313f8dc6e0716416186 (diff) | |
download | linux-cbbd05d036e91b9dd976af4382f6c8d91b69b38a.tar.xz |
cxl: fix spelling mistakes
Correct spelling mistakes (reported by codespell).
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Alison Schofield <alison.schofield@intel.com>
Cc: Vishal Verma <vishal.l.verma@intel.com>
Cc: Ira Weiny <ira.weiny@intel.com>
Cc: Ben Widawsky <bwidawsk@kernel.org>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: linux-cxl@vger.kernel.org
Reviewed-by: Vishal Verma <vishal.l.verma@intel.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Link: https://lore.kernel.org/r/20230125032221.21277-1-rdunlap@infradead.org
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers/cxl/core/port.c')
-rw-r--r-- | drivers/cxl/core/port.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c index 410c036c09fa..609aa6801b14 100644 --- a/drivers/cxl/core/port.c +++ b/drivers/cxl/core/port.c @@ -1164,7 +1164,7 @@ static struct cxl_port *find_cxl_port_at(struct cxl_port *parent_port, } /* - * All users of grandparent() are using it to walk PCIe-like swich port + * All users of grandparent() are using it to walk PCIe-like switch port * hierarchy. A PCIe switch is comprised of a bridge device representing the * upstream switch port and N bridges representing downstream switch ports. When * bridges stack the grand-parent of a downstream switch port is another |