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| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2024-03-27 12:58:48 +0300 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2024-04-07 14:38:45 +0300 |
| commit | 5b9706bfc094314c600ab810a61208a7cbaa4cb3 (patch) | |
| tree | c91f5bc0c085beba74e4884477dbce65a5d916fe /drivers/dma | |
| parent | 244296cc3a155199a8b080d19e645d7d49081a38 (diff) | |
| download | linux-5b9706bfc094314c600ab810a61208a7cbaa4cb3.tar.xz | |
dmaengine: xilinx: xdma: Fix wrong offsets in the buffers addresses in dma descriptor
The addition of interleaved transfers slightly changed the way
addresses inside DMA descriptors are derived, breaking cyclic
transfers.
Fixes: 3e184e64c2e5 ("dmaengine: xilinx: xdma: Prepare the introduction of interleaved DMA transfers")
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Louis Chauvet <louis.chauvet@bootlin.com>
Link: https://lore.kernel.org/r/20240327-digigram-xdma-fixes-v1-1-45f4a52c0283@bootlin.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/dma')
| -rw-r--r-- | drivers/dma/xilinx/xdma.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/dma/xilinx/xdma.c b/drivers/dma/xilinx/xdma.c index 170017ff2aad..b9788aa8f6b7 100644 --- a/drivers/dma/xilinx/xdma.c +++ b/drivers/dma/xilinx/xdma.c @@ -704,7 +704,7 @@ xdma_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t address, desc_num = 0; for (i = 0; i < periods; i++) { desc_num += xdma_fill_descs(sw_desc, *src, *dst, period_size, desc_num); - addr += i * period_size; + addr += period_size; } tx_desc = vchan_tx_prep(&xdma_chan->vchan, &sw_desc->vdesc, flags); |