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authorBorislav Petkov <borislav.petkov@amd.com>2011-01-12 00:08:07 +0300
committerBorislav Petkov <borislav.petkov@amd.com>2011-03-17 16:46:20 +0300
commit95b0ef55cd8a8278b64c7ba98c29cda5f4e4b617 (patch)
tree95bb1fb585fe4a410d4f7065fa72f3c6b38b0956 /drivers/edac/amd64_edac.h
parent700466249f9bb787165da64d2615cee456d88751 (diff)
downloadlinux-95b0ef55cd8a8278b64c7ba98c29cda5f4e4b617.tar.xz
amd64_edac: Add support for interleaved region swapping
On revC3 and revE Fam10h machines and later, non-interleaved graphics framebuffer memory under the 16G mark can be swapped with a region located at the bottom of memory so that the GPU can use the interleaved region and thus two channels. Add support for that. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'drivers/edac/amd64_edac.h')
-rw-r--r--drivers/edac/amd64_edac.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index 6ae8aa8cc178..85e3acbc087a 100644
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -239,6 +239,8 @@
#define dct_dram_enabled(pvt) ((pvt)->dct_sel_lo & BIT(8))
#define dct_memory_cleared(pvt) ((pvt)->dct_sel_lo & BIT(10))
+#define SWAP_INTLV_REG 0x10c
+
#define DCT_SEL_HI 0x114
/*