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| author | Alex Deucher <alexander.deucher@amd.com> | 2018-01-05 18:25:57 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-02-19 22:17:14 +0300 |
| commit | b1d128689f9c602a3dbea37b47a27a568d55754d (patch) | |
| tree | 6e7f5703c0ed9a28b140017fc3fc3bd0504a9cc4 /drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | |
| parent | 73c732405fddfe16b122c77de83397289463b557 (diff) | |
| download | linux-b1d128689f9c602a3dbea37b47a27a568d55754d.tar.xz | |
drm/amdgpu: adjust HDP write queue flushing for tlb invalidation
Separate tlb invalidation and hdp flushing and move the HDP
flush to the caller.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c index 5f5eb15ccf4a..aa06e7232d29 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c @@ -360,8 +360,6 @@ static int gmc_v6_0_mc_init(struct amdgpu_device *adev) static void gmc_v6_0_gart_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid) { - WREG32(mmHDP_MEM_COHERENCY_FLUSH_CNTL, 0); - WREG32(mmVM_INVALIDATE_REQUEST, 1 << vmid); } |