diff options
| author | yipechai <YiPeng.Chai@amd.com> | 2022-01-30 12:03:32 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-02-14 23:08:40 +0300 |
| commit | bdb3489cfca16815e9a737359e9e90a4af5d0ff3 (patch) | |
| tree | 47d9a52a063e953fe2cf39046e86ba248fe129b8 /drivers/gpu/drm/amd/amdgpu/mca_v3_0.c | |
| parent | 22b1df28c009aaf78e77b20a9cc8d8bf98e698c8 (diff) | |
| download | linux-bdb3489cfca16815e9a737359e9e90a4af5d0ff3.tar.xz | |
drm/amdgpu: Optimize xxx_ras_late_init/xxx_ras_late_fini for each ras block
1. Define amdgpu_ras_block_late_init to create sysfs nodes
and interrupt handles.
2. Define amdgpu_ras_block_late_fini to remove sysfs nodes
and interrupt handles.
3. Replace ras block variable members in struct
amdgpu_ras_block_object with struct ras_common_if, which
can make it easy to associate each ras block instance
with each ras block functional interface.
4. Add .ras_cb to struct amdgpu_ras_block_object.
5. Change each ras block to fit for the changement of struct
amdgpu_ras_block_object.
Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/mca_v3_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/mca_v3_0.c | 28 |
1 files changed, 17 insertions, 11 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c index 68565262af9c..386416378a82 100644 --- a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c @@ -53,8 +53,8 @@ static int mca_v3_0_ras_block_match(struct amdgpu_ras_block_object *block_obj, if (!block_obj) return -EINVAL; - if ((block_obj->block == block) && - (block_obj->sub_block_index == sub_block_index)) { + if ((block_obj->ras_comm.block == block) && + (block_obj->ras_comm.sub_block_index == sub_block_index)) { return 0; } @@ -68,9 +68,11 @@ const struct amdgpu_ras_block_hw_ops mca_v3_0_mp0_hw_ops = { struct amdgpu_mca_ras_block mca_v3_0_mp0_ras = { .ras_block = { - .block = AMDGPU_RAS_BLOCK__MCA, - .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP0, - .name = "mp0", + .ras_comm = { + .block = AMDGPU_RAS_BLOCK__MCA, + .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP0, + .name = "mp0", + }, .hw_ops = &mca_v3_0_mp0_hw_ops, .ras_block_match = mca_v3_0_ras_block_match, .ras_late_init = mca_v3_0_mp0_ras_late_init, @@ -103,9 +105,11 @@ const struct amdgpu_ras_block_hw_ops mca_v3_0_mp1_hw_ops = { struct amdgpu_mca_ras_block mca_v3_0_mp1_ras = { .ras_block = { - .block = AMDGPU_RAS_BLOCK__MCA, - .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP1, - .name = "mp1", + .ras_comm = { + .block = AMDGPU_RAS_BLOCK__MCA, + .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP1, + .name = "mp1", + }, .hw_ops = &mca_v3_0_mp1_hw_ops, .ras_block_match = mca_v3_0_ras_block_match, .ras_late_init = mca_v3_0_mp1_ras_late_init, @@ -138,9 +142,11 @@ const struct amdgpu_ras_block_hw_ops mca_v3_0_mpio_hw_ops = { struct amdgpu_mca_ras_block mca_v3_0_mpio_ras = { .ras_block = { - .block = AMDGPU_RAS_BLOCK__MCA, - .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MPIO, - .name = "mpio", + .ras_comm = { + .block = AMDGPU_RAS_BLOCK__MCA, + .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MPIO, + .name = "mpio", + }, .hw_ops = &mca_v3_0_mpio_hw_ops, .ras_block_match = mca_v3_0_ras_block_match, .ras_late_init = mca_v3_0_mpio_ras_late_init, |