diff options
author | Jack Xiao <Jack.Xiao@amd.com> | 2019-06-06 06:14:07 +0300 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2020-07-01 08:59:08 +0300 |
commit | 52d6bb128eeee595022f1892e6bddde6bd68e45d (patch) | |
tree | 82cd368c4bc417f27a25720d320acdc25942a497 /drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | |
parent | 1513e24aa4b40119de128e0a0171fd0c5d54ea4f (diff) | |
download | linux-52d6bb128eeee595022f1892e6bddde6bd68e45d.tar.xz |
drm/amdgpu/mes10.1: allocate mqd buffer
Allocate mqd buffer preparing for mes queue setup.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/mes_v10_1.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c index 80f6812d8ecf..ace82c477f01 100644 --- a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c +++ b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c @@ -28,6 +28,7 @@ #include "nv.h" #include "gc/gc_10_1_0_offset.h" #include "gc/gc_10_1_0_sh_mask.h" +#include "v10_structs.h" MODULE_FIRMWARE("amdgpu/navi10_mes.bin"); @@ -375,6 +376,32 @@ static int mes_v10_1_ring_init(struct amdgpu_device *adev) return 0; } +static int mes_v10_1_mqd_sw_init(struct amdgpu_device *adev) +{ + int r, mqd_size = sizeof(struct v10_compute_mqd); + struct amdgpu_ring *ring = &adev->mes.ring; + + if (ring->mqd_obj) + return 0; + + r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE, + AMDGPU_GEM_DOMAIN_GTT, &ring->mqd_obj, + &ring->mqd_gpu_addr, &ring->mqd_ptr); + if (r) { + dev_warn(adev->dev, "failed to create ring mqd bo (%d)", r); + return r; + } + + /* prepare MQD backup */ + adev->mes.mqd_backup = kmalloc(mqd_size, GFP_KERNEL); + if (!adev->mes.mqd_backup) + dev_warn(adev->dev, + "no memory to create MQD backup for ring %s\n", + ring->name); + + return 0; +} + static int mes_v10_1_sw_init(void *handle) { int r; @@ -390,6 +417,10 @@ static int mes_v10_1_sw_init(void *handle) if (r) return r; + r = mes_v10_1_mqd_sw_init(adev); + if (r) + return r; + return 0; } @@ -397,6 +428,12 @@ static int mes_v10_1_sw_fini(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; + kfree(adev->mes.mqd_backup); + + amdgpu_bo_free_kernel(&adev->mes.ring.mqd_obj, + &adev->mes.ring.mqd_gpu_addr, + &adev->mes.ring.mqd_ptr); + amdgpu_bo_free_kernel(&adev->mes.eop_gpu_obj, &adev->mes.eop_gpu_addr, NULL); |