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| author | Tao Zhou <tao.zhou1@amd.com> | 2022-01-19 11:00:11 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-01-27 23:49:02 +0300 |
| commit | 498d46fe7aa7eda5807352d62af133a2f432b814 (patch) | |
| tree | 81f4f70fc0a5403daf24ee4b1f9853bdcd75c519 /drivers/gpu/drm/amd/amdgpu/umc_v6_7.h | |
| parent | 400013b268cb666a44c0827b136bfd4bb741b13d (diff) | |
| download | linux-498d46fe7aa7eda5807352d62af133a2f432b814.tar.xz | |
drm/amdgpu: increase bad page number for umc ras query
One piece of umc normalizing address can be mapped to 16 pieces of
physical address in each umc channel on ALDEBARAN.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/umc_v6_7.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/umc_v6_7.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v6_7.h b/drivers/gpu/drm/amd/amdgpu/umc_v6_7.h index 1f2edf625370..9adebcf98582 100644 --- a/drivers/gpu/drm/amd/amdgpu/umc_v6_7.h +++ b/drivers/gpu/drm/amd/amdgpu/umc_v6_7.h @@ -41,6 +41,10 @@ #define UMC_V6_7_CHANNEL_INSTANCE_NUM 8 /* total channel instances in one umc block */ #define UMC_V6_7_TOTAL_CHANNEL_NUM (UMC_V6_7_CHANNEL_INSTANCE_NUM * UMC_V6_7_UMC_INSTANCE_NUM) +/* one piece of normalizing address is mapped to 8 pieces of physical address */ +#define UMC_V6_7_NA_MAP_PA_NUM 8 +/* R14 bit shift should be considered, double the number */ +#define UMC_V6_7_BAD_PAGE_NUM_PER_CHANNEL (UMC_V6_7_NA_MAP_PA_NUM * 2) /* UMC regiser per channel offset */ #define UMC_V6_7_PER_CHANNEL_OFFSET 0x400 extern struct amdgpu_umc_ras umc_v6_7_ras; |