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author | Kent Russell <kent.russell@amd.com> | 2019-09-10 22:48:55 +0300 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2019-09-16 18:42:55 +0300 |
commit | 3e103fc301560e99913f4b9d48691d77160ed595 (patch) | |
tree | 9b27db3b130471889a53e2f6fb7f483329bd8340 /drivers/gpu/drm/amd/amdgpu | |
parent | ec671737f8edfb8edf246afd425fdbed35284b23 (diff) | |
download | linux-3e103fc301560e99913f4b9d48691d77160ed595.tar.xz |
Revert "drm/amdgpu/nbio7.4: add hw bug workaround for vega20"
This reverts commit e01f2d41895102d824c6b8f5e011dd5e286d5e8b.
VG20 did not require this workaround, as the fix is in the VBIOS.
Leave VG10/12 workaround as some older shipped cards do not have the
VBIOS fix in place, and the kernel workaround is required in those
situations
Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c index b776332d979f..238c2483496a 100644 --- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c @@ -308,13 +308,7 @@ static void nbio_v7_4_detect_hw_virt(struct amdgpu_device *adev) static void nbio_v7_4_init_registers(struct amdgpu_device *adev) { - uint32_t def, data; - - def = data = RREG32_PCIE(smnPCIE_CI_CNTL); - data = REG_SET_FIELD(data, PCIE_CI_CNTL, CI_SLV_ORDERING_DIS, 1); - if (def != data) - WREG32_PCIE(smnPCIE_CI_CNTL, data); } static void nbio_v7_4_handle_ras_controller_intr_no_bifring(struct amdgpu_device *adev) |