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author | Tony Cheng <tony.cheng@amd.com> | 2017-08-04 04:23:04 +0300 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-27 01:16:23 +0300 |
commit | 8a5d82451e297fc3864bb9ab0247b53c7ab8a022 (patch) | |
tree | 366adab8301fc08405c76300a9ef61bd25272010 /drivers/gpu/drm/amd/display/dc/dc_helper.c | |
parent | 5aa72db72ccc08c2d3d3e4b0a285bab932db5132 (diff) | |
download | linux-8a5d82451e297fc3864bb9ab0247b53c7ab8a022.tar.xz |
drm/amd/display: use some sensible time out
40s time out is not sensible.
also make all udelay poll happen more frequently since CPU is busy anyways
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_helper.c')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_helper.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_helper.c b/drivers/gpu/drm/amd/display/dc/dc_helper.c index f219bd2068e5..0d84b2a1ccfd 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_helper.c +++ b/drivers/gpu/drm/amd/display/dc/dc_helper.c @@ -135,6 +135,9 @@ uint32_t generic_reg_wait(const struct dc_context *ctx, uint32_t reg_val; int i; + /* something is terribly wrong if time out is > 200ms. (5Hz) */ + ASSERT(delay_between_poll_us * time_out_num_tries <= 200000); + if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) { /* 35 seconds */ delay_between_poll_us = 35000; @@ -158,7 +161,8 @@ uint32_t generic_reg_wait(const struct dc_context *ctx, } dm_error("REG_WAIT timeout %dus * %d tries - %s line:%d\n", - delay_between_poll_us, time_out_num_tries, func_name, line); + delay_between_poll_us, time_out_num_tries, + func_name, line); if (!IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) BREAK_TO_DEBUGGER(); |