diff options
| author | Hersen Wu <hersenxs.wu@amd.com> | 2016-12-23 23:13:13 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-27 00:07:51 +0300 |
| commit | 5a7a1eebc6199a8e19cc6497cffb3e16d9d55333 (patch) | |
| tree | d015f8ff82f7b5a3f3806b75ae7bf42662b5c3d5 /drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c | |
| parent | aff20230b439921d6660eb2ef6d9f6c273d9b240 (diff) | |
| download | linux-5a7a1eebc6199a8e19cc6497cffb3e16d9d55333.tar.xz | |
drm/amd/display: set HBR3 and TPS4 capable flags
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Zeyu Fan <Zeyu.Fan@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c index 6481fb2028ee..ea4778b6e6d8 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c @@ -1068,9 +1068,19 @@ bool dce110_link_encoder_construct( &bp_cap_info)) enc110->base.features.flags.bits.IS_HBR2_CAPABLE = bp_cap_info.DP_HBR2_CAP; + enc110->base.features.flags.bits.IS_HBR3_CAPABLE = + bp_cap_info.DP_HBR3_EN; + } + + /* TODO: check PPLIB maxPhyClockInKHz <= 540000, if yes, + * IS_HBR3_CAPABLE = 0. + */ + /* test pattern 3 support */ enc110->base.features.flags.bits.IS_TPS3_CAPABLE = true; + /* test pattern 4 support */ + enc110->base.features.flags.bits.IS_TPS4_CAPABLE = true; enc110->base.features.flags.bits.IS_Y_ONLY_CAPABLE = false; /* |