diff options
author | Charlene Liu <charlene.liu@amd.com> | 2023-08-25 22:04:46 +0300 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2023-09-20 23:24:08 +0300 |
commit | cc1bfdabda2043c6ef8fd97d94d1e94c1b29181d (patch) | |
tree | 06e20a6811be6e79554c51ea993db79c01a593d2 /drivers/gpu/drm/amd/display/dc/dcn10 | |
parent | 49a8f94b1fb0d1275f8f23f79c2a4cecf7b202e2 (diff) | |
download | linux-cc1bfdabda2043c6ef8fd97d94d1e94c1b29181d.tar.xz |
drm/amd/display: fix some non-initialized register mask and setting
Fix some non-initialized register mask and update golden setting.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Duncan Ma <duncan.ma@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h index 5ddf2b36986e..4201b7627030 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h @@ -177,6 +177,7 @@ struct dcn_hubbub_registers { uint32_t DCHUBBUB_SDPIF_CFG1; uint32_t DCHUBBUB_CLOCK_CNTL; uint32_t DCHUBBUB_MEM_PWR_MODE_CTRL; + uint32_t DCHUBBUB_ARB_QOS_FORCE; }; #define HUBBUB_REG_FIELD_LIST_DCN32(type) \ @@ -199,8 +200,9 @@ struct dcn_hubbub_registers { type MALL_PREFETCH_COMPLETE;\ type MALL_IN_USE -#define HUBBUB_REG_FIELD_LIST_DCN35(type) \ - type DCHUBBUB_FGCG_REP_DIS + #define HUBBUB_REG_FIELD_LIST_DCN35(type) \ + type DCHUBBUB_FGCG_REP_DIS;\ + type DCHUBBUB_ARB_ALLOW_CSTATE_DEEPSLEEP_LEGACY_MODE /* set field name */ #define HUBBUB_SF(reg_name, field_name, post_fix)\ @@ -396,7 +398,7 @@ struct dcn_hubbub_mask { HUBBUB_HVM_REG_FIELD_LIST(uint32_t); HUBBUB_RET_REG_FIELD_LIST(uint32_t); HUBBUB_REG_FIELD_LIST_DCN32(uint32_t); - HUBBUB_REG_FIELD_LIST_DCN35(uint8_t); + HUBBUB_REG_FIELD_LIST_DCN35(uint32_t); }; struct dc; |