diff options
author | Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> | 2023-06-08 17:44:42 +0300 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2023-06-23 22:44:48 +0300 |
commit | effee878a8661d7f4f497304ecf256e4b1790d1e (patch) | |
tree | 783f75ef4acb0194d3370e9a6ef2c5b639b209b4 /drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h | |
parent | 0250a7145e9c44c9f60d14aed7b66ed3a9de07f9 (diff) | |
download | linux-effee878a8661d7f4f497304ecf256e4b1790d1e.tar.xz |
drm/amd/display: fix odm k2 div calculation
Correct setting is div by 2 for odm. Seamless odm transitions
are enabled with enable_dp_dig_pixel_rate_div_policy debug flag.
Fixes: a2c7356f526d ("drm/amd/display: fix pixel rate update sequence")
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h index 3841da67a737..eafcc4ea6d24 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h +++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_hwseq.h @@ -37,7 +37,7 @@ void dcn314_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool po void dcn314_enable_power_gating_plane(struct dce_hwseq *hws, bool enable); -void dcn314_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsigned int *k1_div, unsigned int *k2_div); +unsigned int dcn314_calculate_dccg_k1_k2_values(struct pipe_ctx *pipe_ctx, unsigned int *k1_div, unsigned int *k2_div); void dcn314_set_pixels_per_cycle(struct pipe_ctx *pipe_ctx); |