diff options
| author | George Shen <george.shen@amd.com> | 2023-09-22 21:38:31 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-10-10 00:01:08 +0300 |
| commit | 9af4377fd5d04e7e9e2477d13dbea32849de04e7 (patch) | |
| tree | c0dff6844451c76414ee30b8029b7edc0d8e5adc /drivers/gpu/drm/amd/display/dc/dml | |
| parent | 051d90070d4c811d7413756cc42a59f2c28e0d0f (diff) | |
| download | linux-9af4377fd5d04e7e9e2477d13dbea32849de04e7.tar.xz | |
drm/amd/display: Disable SubVP if test pattern is enabled
[Why]
Enabling DPG causes HUBP to stay in blank constantly. If DPG is enabled
while an MCLK switch is taking place with SubVP, it will cause the MCLK
to never complete. This is because SubVP MCLK switch relies a HUBP
VLine interrupt, which will never occur when HUBP is constantly in
blank.
[How]
Disable SubVP when test pattern is enabled.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Reviewed-by: Nevenko Stupar <nevenko.stupar@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dml')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c index b01177923808..9ec4172d1c2d 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c @@ -1383,6 +1383,19 @@ static void try_odm_power_optimization_and_revalidate( } } +static bool is_test_pattern_enabled( + struct dc_state *context) +{ + int i; + + for (i = 0; i < context->stream_count; i++) { + if (context->streams[i]->test_pattern.type != DP_TEST_PATTERN_VIDEO_MODE) + return true; + } + + return false; +} + static void dcn32_full_validate_bw_helper(struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes, @@ -1426,7 +1439,7 @@ static void dcn32_full_validate_bw_helper(struct dc *dc, * 5. (Config doesn't support MCLK in VACTIVE/VBLANK || dc->debug.force_subvp_mclk_switch) */ if (!dc->debug.force_disable_subvp && !dc->caps.dmub_caps.gecc_enable && dcn32_all_pipes_have_stream_and_plane(dc, context) && - !dcn32_mpo_in_use(context) && !dcn32_any_surfaces_rotated(dc, context) && + !dcn32_mpo_in_use(context) && !dcn32_any_surfaces_rotated(dc, context) && !is_test_pattern_enabled(context) && (*vlevel == context->bw_ctx.dml.soc.num_states || vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported || dc->debug.force_subvp_mclk_switch)) { |